Semiconductor memory device and memory system configured to perform tracking read on first memory cells followed by shift read on second memory cells using read voltage correction value determined during the tracking read

A semiconductor memory device includes first, second, and third memory cells, and first, second, and third word lines that are respectively connected to gates of the first, second, and third memory cells. A control circuit executes first, second, and third read operations in response to first, secon...

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Bibliographische Detailangaben

Hauptverfasser:	Utsunomiya, Yuko, Nakai, Jun, Yanagidaira, Kosuke, Konno, Hayato, Harada, Yoshikazu, Kami, Hiroe
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
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