Multi-gate transistor

A semiconductor device includes a substrate, first through fourth gate electrodes, and first through fifth fin active pattern. A first recess which is formed in the substrate between the first and second gate electrodes intersecting the second fin active pattern, is filled with a first source/drain...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	Yi, Ji Hye, Kim, Hyo Jin, Ha, Ryong, Yu, Hyun Kwan, Shin, Dong Suk
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

container_end_page
container_issue
container_start_page
container_title
container_volume
creator	Yi, Ji Hye Kim, Hyo Jin Ha, Ryong Yu, Hyun Kwan Shin, Dong Suk
description	A semiconductor device includes a substrate, first through fourth gate electrodes, and first through fifth fin active pattern. A first recess which is formed in the substrate between the first and second gate electrodes intersecting the second fin active pattern, is filled with a first source/drain region, and has a first depth in a third direction perpendicular to the first and second directions. A second recess which is formed in the substrate between the third and fourth gate electrodes intersecting the second fin active pattern, is filled with a second source/drain region, and has a second depth in the third direction. A third recess which is formed in the substrate between the second and third gate electrodes intersecting the second fin active pattern, is filled with a third source/drain region, and has a third depth in the third direction. The third depth is greater than the first and second depths.
format	Patent
fullrecord	<record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US10121791B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US10121791B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US10121791B23</originalsourceid><addsrcrecordid>eNrjZBD1Lc0pydRNTyxJVSgpSswrziwuyS_iYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxocGGBoZGhuaWhk5GxsSoAQCJiSFu</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Multi-gate transistor</title><source>esp@cenet</source><creator>Yi, Ji Hye ; Kim, Hyo Jin ; Ha, Ryong ; Yu, Hyun Kwan ; Shin, Dong Suk</creator><creatorcontrib>Yi, Ji Hye ; Kim, Hyo Jin ; Ha, Ryong ; Yu, Hyun Kwan ; Shin, Dong Suk</creatorcontrib><description>A semiconductor device includes a substrate, first through fourth gate electrodes, and first through fifth fin active pattern. A first recess which is formed in the substrate between the first and second gate electrodes intersecting the second fin active pattern, is filled with a first source/drain region, and has a first depth in a third direction perpendicular to the first and second directions. A second recess which is formed in the substrate between the third and fourth gate electrodes intersecting the second fin active pattern, is filled with a second source/drain region, and has a second depth in the third direction. A third recess which is formed in the substrate between the second and third gate electrodes intersecting the second fin active pattern, is filled with a third source/drain region, and has a third depth in the third direction. The third depth is greater than the first and second depths.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20181106&DB=EPODOC&CC=US&NR=10121791B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20181106&DB=EPODOC&CC=US&NR=10121791B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Yi, Ji Hye</creatorcontrib><creatorcontrib>Kim, Hyo Jin</creatorcontrib><creatorcontrib>Ha, Ryong</creatorcontrib><creatorcontrib>Yu, Hyun Kwan</creatorcontrib><creatorcontrib>Shin, Dong Suk</creatorcontrib><title>Multi-gate transistor</title><description>A semiconductor device includes a substrate, first through fourth gate electrodes, and first through fifth fin active pattern. A first recess which is formed in the substrate between the first and second gate electrodes intersecting the second fin active pattern, is filled with a first source/drain region, and has a first depth in a third direction perpendicular to the first and second directions. A second recess which is formed in the substrate between the third and fourth gate electrodes intersecting the second fin active pattern, is filled with a second source/drain region, and has a second depth in the third direction. A third recess which is formed in the substrate between the second and third gate electrodes intersecting the second fin active pattern, is filled with a third source/drain region, and has a third depth in the third direction. The third depth is greater than the first and second depths.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBD1Lc0pydRNTyxJVSgpSswrziwuyS_iYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxocGGBoZGhuaWhk5GxsSoAQCJiSFu</recordid><startdate>20181106</startdate><enddate>20181106</enddate><creator>Yi, Ji Hye</creator><creator>Kim, Hyo Jin</creator><creator>Ha, Ryong</creator><creator>Yu, Hyun Kwan</creator><creator>Shin, Dong Suk</creator><scope>EVB</scope></search><sort><creationdate>20181106</creationdate><title>Multi-gate transistor</title><author>Yi, Ji Hye ; Kim, Hyo Jin ; Ha, Ryong ; Yu, Hyun Kwan ; Shin, Dong Suk</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US10121791B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Yi, Ji Hye</creatorcontrib><creatorcontrib>Kim, Hyo Jin</creatorcontrib><creatorcontrib>Ha, Ryong</creatorcontrib><creatorcontrib>Yu, Hyun Kwan</creatorcontrib><creatorcontrib>Shin, Dong Suk</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Yi, Ji Hye</au><au>Kim, Hyo Jin</au><au>Ha, Ryong</au><au>Yu, Hyun Kwan</au><au>Shin, Dong Suk</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Multi-gate transistor</title><date>2018-11-06</date><risdate>2018</risdate><abstract>A semiconductor device includes a substrate, first through fourth gate electrodes, and first through fifth fin active pattern. A first recess which is formed in the substrate between the first and second gate electrodes intersecting the second fin active pattern, is filled with a first source/drain region, and has a first depth in a third direction perpendicular to the first and second directions. A second recess which is formed in the substrate between the third and fourth gate electrodes intersecting the second fin active pattern, is filled with a second source/drain region, and has a second depth in the third direction. A third recess which is formed in the substrate between the second and third gate electrodes intersecting the second fin active pattern, is filled with a third source/drain region, and has a third depth in the third direction. The third depth is greater than the first and second depths.</abstract><oa>free_for_read</oa></addata></record>
fulltext	fulltext_linktorsrc
identifier
ispartof
issn
language	eng
recordid	cdi_epo_espacenet_US10121791B2
source	esp@cenet
subjects	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
title	Multi-gate transistor
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-10T13%3A54%3A34IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Yi,%20Ji%20Hye&rft.date=2018-11-06&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS10121791B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true