Method and apparatus for clock skew control with low jitter in an integrated circuit

An apparatus of performing a clock skew adjustment between at least first and second clock signals includes first and second skew sensors and a skew controller. The first skew sensor receives a third clock signal obtained by delaying the first clock signal by a first delay and a fourth clock signal...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Cilek, Fatih, Ringe, Matthias, Koch, Michael, Arp, Andreas, Hertwig, Andre
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS PHYSICS PULSE TECHNIQUE RESONATORS
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