Memory device and system including on chip ECC circuit

An on-chip logic block may include a host ECC circuit configured to correct an error based on host parity. The on-chip logic block may include a memory ECC circuit configured to correct an error based on memory parity.

Bibliographische Detailangaben

Hauptverfasser:	Lee, Ho Kyoon, Park, Il, Baek, Jin Ho, Kim, Jang Ryul
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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