System-level interconnect ring for a programmable integrated circuit

An example programmable integrated circuit (IC) includes a programmable fabric having a programmable interconnect and wire tracks adjacent to at least one edge of the programmable fabric. The programmable IC further includes at least one ring node integrated with at least one edge of the programmabl...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	Dellinger, Eric F, Maidee, Pongstorn, Kaviani, Alireza S
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

container_end_page
container_issue
container_start_page
container_title
container_volume
creator	Dellinger, Eric F Maidee, Pongstorn Kaviani, Alireza S
description	An example programmable integrated circuit (IC) includes a programmable fabric having a programmable interconnect and wire tracks adjacent to at least one edge of the programmable fabric. The programmable IC further includes at least one ring node integrated with at least one edge of the programmable fabric, the at least one ring node coupled between the programmable interconnect and the wire tracks. The programmable IC further includes a system-in-package (SiP) input/output (IO) circuit coupled to the wire tracks.
format	Patent
fullrecord	<record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US10042806B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US10042806B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US10042806B23</originalsourceid><addsrcrecordid>eNrjZHAJriwuSc3VzUktS81RyMwrSS1Kzs_LS00uUSjKzEtXSMsvUkhUKCjKTy9KzM1NTMpJBSsC8kpSUxSSM4uSSzNLeBhY0xJzilN5oTQ3g6Kba4izh25qQX58anFBYnJqXmpJfGiwoYGBiZGFgZmTkTExagD3DjNq</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>System-level interconnect ring for a programmable integrated circuit</title><source>esp@cenet</source><creator>Dellinger, Eric F ; Maidee, Pongstorn ; Kaviani, Alireza S</creator><creatorcontrib>Dellinger, Eric F ; Maidee, Pongstorn ; Kaviani, Alireza S</creatorcontrib><description>An example programmable integrated circuit (IC) includes a programmable fabric having a programmable interconnect and wire tracks adjacent to at least one edge of the programmable fabric. The programmable IC further includes at least one ring node integrated with at least one edge of the programmable fabric, the at least one ring node coupled between the programmable interconnect and the wire tracks. The programmable IC further includes a system-in-package (SiP) input/output (IO) circuit coupled to the wire tracks.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180807&DB=EPODOC&CC=US&NR=10042806B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76294</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180807&DB=EPODOC&CC=US&NR=10042806B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Dellinger, Eric F</creatorcontrib><creatorcontrib>Maidee, Pongstorn</creatorcontrib><creatorcontrib>Kaviani, Alireza S</creatorcontrib><title>System-level interconnect ring for a programmable integrated circuit</title><description>An example programmable integrated circuit (IC) includes a programmable fabric having a programmable interconnect and wire tracks adjacent to at least one edge of the programmable fabric. The programmable IC further includes at least one ring node integrated with at least one edge of the programmable fabric, the at least one ring node coupled between the programmable interconnect and the wire tracks. The programmable IC further includes a system-in-package (SiP) input/output (IO) circuit coupled to the wire tracks.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHAJriwuSc3VzUktS81RyMwrSS1Kzs_LS00uUSjKzEtXSMsvUkhUKCjKTy9KzM1NTMpJBSsC8kpSUxSSM4uSSzNLeBhY0xJzilN5oTQ3g6Kba4izh25qQX58anFBYnJqXmpJfGiwoYGBiZGFgZmTkTExagD3DjNq</recordid><startdate>20180807</startdate><enddate>20180807</enddate><creator>Dellinger, Eric F</creator><creator>Maidee, Pongstorn</creator><creator>Kaviani, Alireza S</creator><scope>EVB</scope></search><sort><creationdate>20180807</creationdate><title>System-level interconnect ring for a programmable integrated circuit</title><author>Dellinger, Eric F ; Maidee, Pongstorn ; Kaviani, Alireza S</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US10042806B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Dellinger, Eric F</creatorcontrib><creatorcontrib>Maidee, Pongstorn</creatorcontrib><creatorcontrib>Kaviani, Alireza S</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Dellinger, Eric F</au><au>Maidee, Pongstorn</au><au>Kaviani, Alireza S</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>System-level interconnect ring for a programmable integrated circuit</title><date>2018-08-07</date><risdate>2018</risdate><abstract>An example programmable integrated circuit (IC) includes a programmable fabric having a programmable interconnect and wire tracks adjacent to at least one edge of the programmable fabric. The programmable IC further includes at least one ring node integrated with at least one edge of the programmable fabric, the at least one ring node coupled between the programmable interconnect and the wire tracks. The programmable IC further includes a system-in-package (SiP) input/output (IO) circuit coupled to the wire tracks.</abstract><oa>free_for_read</oa></addata></record>
fulltext	fulltext_linktorsrc
identifier
ispartof
issn
language	eng
recordid	cdi_epo_espacenet_US10042806B2
source	esp@cenet
subjects	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
title	System-level interconnect ring for a programmable integrated circuit
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-23T03%3A17%3A40IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Dellinger,%20Eric%20F&rft.date=2018-08-07&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS10042806B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true