Semiconductor device and method of manufacturing the same
In a resin sealing type semiconductor device, a semiconductor chip CP2 is mounted over a die pad DP having conductivity via a bonding member BD2 having insulation property, and a semiconductor chip CP1 is mounted over the die pad DP via a bonding member BD1 having conductivity. A first length of a p...
Gespeichert in:
Hauptverfasser: | , , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | Nakamura, Hiroyuki Yato, Yuichi Danno, Tadatoshi Oka, Hiroi Nishikizawa, Atsushi |
description | In a resin sealing type semiconductor device, a semiconductor chip CP2 is mounted over a die pad DP having conductivity via a bonding member BD2 having insulation property, and a semiconductor chip CP1 is mounted over the die pad DP via a bonding member BD1 having conductivity. A first length of a portion, in a first side formed by an intersection of a first side surface and a second side surface of the semiconductor chip CP2, covered with the bonding member BD2 is larger than a second length of a portion, in a second side formed by an intersection of a third side surface and a fourth side surface of the semiconductor chip CP1, covered with the bonding member BD1. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US10037932B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US10037932B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US10037932B23</originalsourceid><addsrcrecordid>eNrjZLAMTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE0tychPUchPU8hNzCtNS0wuKS3KzEtXKMlIVShOzE3lYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxocGGBgbG5pbGRk5GxsSoAQBPXC7Z</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device and method of manufacturing the same</title><source>esp@cenet</source><creator>Nakamura, Hiroyuki ; Yato, Yuichi ; Danno, Tadatoshi ; Oka, Hiroi ; Nishikizawa, Atsushi</creator><creatorcontrib>Nakamura, Hiroyuki ; Yato, Yuichi ; Danno, Tadatoshi ; Oka, Hiroi ; Nishikizawa, Atsushi</creatorcontrib><description>In a resin sealing type semiconductor device, a semiconductor chip CP2 is mounted over a die pad DP having conductivity via a bonding member BD2 having insulation property, and a semiconductor chip CP1 is mounted over the die pad DP via a bonding member BD1 having conductivity. A first length of a portion, in a first side formed by an intersection of a first side surface and a second side surface of the semiconductor chip CP2, covered with the bonding member BD2 is larger than a second length of a portion, in a second side formed by an intersection of a third side surface and a fourth side surface of the semiconductor chip CP1, covered with the bonding member BD1.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180731&DB=EPODOC&CC=US&NR=10037932B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180731&DB=EPODOC&CC=US&NR=10037932B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Nakamura, Hiroyuki</creatorcontrib><creatorcontrib>Yato, Yuichi</creatorcontrib><creatorcontrib>Danno, Tadatoshi</creatorcontrib><creatorcontrib>Oka, Hiroi</creatorcontrib><creatorcontrib>Nishikizawa, Atsushi</creatorcontrib><title>Semiconductor device and method of manufacturing the same</title><description>In a resin sealing type semiconductor device, a semiconductor chip CP2 is mounted over a die pad DP having conductivity via a bonding member BD2 having insulation property, and a semiconductor chip CP1 is mounted over the die pad DP via a bonding member BD1 having conductivity. A first length of a portion, in a first side formed by an intersection of a first side surface and a second side surface of the semiconductor chip CP2, covered with the bonding member BD2 is larger than a second length of a portion, in a second side formed by an intersection of a third side surface and a fourth side surface of the semiconductor chip CP1, covered with the bonding member BD1.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAMTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE0tychPUchPU8hNzCtNS0wuKS3KzEtXKMlIVShOzE3lYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxocGGBgbG5pbGRk5GxsSoAQBPXC7Z</recordid><startdate>20180731</startdate><enddate>20180731</enddate><creator>Nakamura, Hiroyuki</creator><creator>Yato, Yuichi</creator><creator>Danno, Tadatoshi</creator><creator>Oka, Hiroi</creator><creator>Nishikizawa, Atsushi</creator><scope>EVB</scope></search><sort><creationdate>20180731</creationdate><title>Semiconductor device and method of manufacturing the same</title><author>Nakamura, Hiroyuki ; Yato, Yuichi ; Danno, Tadatoshi ; Oka, Hiroi ; Nishikizawa, Atsushi</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US10037932B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Nakamura, Hiroyuki</creatorcontrib><creatorcontrib>Yato, Yuichi</creatorcontrib><creatorcontrib>Danno, Tadatoshi</creatorcontrib><creatorcontrib>Oka, Hiroi</creatorcontrib><creatorcontrib>Nishikizawa, Atsushi</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Nakamura, Hiroyuki</au><au>Yato, Yuichi</au><au>Danno, Tadatoshi</au><au>Oka, Hiroi</au><au>Nishikizawa, Atsushi</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device and method of manufacturing the same</title><date>2018-07-31</date><risdate>2018</risdate><abstract>In a resin sealing type semiconductor device, a semiconductor chip CP2 is mounted over a die pad DP having conductivity via a bonding member BD2 having insulation property, and a semiconductor chip CP1 is mounted over the die pad DP via a bonding member BD1 having conductivity. A first length of a portion, in a first side formed by an intersection of a first side surface and a second side surface of the semiconductor chip CP2, covered with the bonding member BD2 is larger than a second length of a portion, in a second side formed by an intersection of a third side surface and a fourth side surface of the semiconductor chip CP1, covered with the bonding member BD1.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US10037932B2 |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Semiconductor device and method of manufacturing the same |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-18T23%3A14%3A41IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Nakamura,%20Hiroyuki&rft.date=2018-07-31&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS10037932B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |