Multicore processor and method of use that configures core functions based on executing instructions

Multicore processor and method of use that configures core functions based on executing instructions

A multiprocessor system having plural heterogeneous processing units schedules instruction sets for execution on a selected of the processing units by matching workload processing characteristics of processing units and the instruction sets. To establish an instruction set's processing characte...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Newhart, Ronald E, Capps, Jr., Louis B, Cook, Thomas E, Bell, Jr., Robert H, Shapiro, Michael J
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Newhart, Ronald E
Capps, Jr., Louis B
Cook, Thomas E
Bell, Jr., Robert H
Shapiro, Michael J
description A multiprocessor system having plural heterogeneous processing units schedules instruction sets for execution on a selected of the processing units by matching workload processing characteristics of processing units and the instruction sets. To establish an instruction set's processing characteristics, the homogeneous instruction set is executed on each of the plural processing units with one or more performance metrics tracked at each of the processing units to determine which processing unit most efficiently executes the instruction set. Instruction set workload processing characteristics are stored for reference in scheduling subsequent execution of the instruction set.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US10025590B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US10025590B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US10025590B23</originalsourceid><addsrcrecordid>eNqNizEKwkAQRdNYiHqH8QBCjKSwVRQbK7UO6-ZvshBnws4seHxFPYDVK95706I958GilwQak3ioSiLHLT1gvbQkgbKCrHdGXjjELicofYaQ2VsUVro7xbtlwhM-W-SOIqul_PXzYhLcoFj8OCuWx8N1f1phlAY6Og-GNbfLuiyrut6Wu2rzT_MCQCc_ug</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Multicore processor and method of use that configures core functions based on executing instructions</title><source>esp@cenet</source><creator>Newhart, Ronald E ; Capps, Jr., Louis B ; Cook, Thomas E ; Bell, Jr., Robert H ; Shapiro, Michael J</creator><creatorcontrib>Newhart, Ronald E ; Capps, Jr., Louis B ; Cook, Thomas E ; Bell, Jr., Robert H ; Shapiro, Michael J</creatorcontrib><description>A multiprocessor system having plural heterogeneous processing units schedules instruction sets for execution on a selected of the processing units by matching workload processing characteristics of processing units and the instruction sets. To establish an instruction set's processing characteristics, the homogeneous instruction set is executed on each of the plural processing units with one or more performance metrics tracked at each of the processing units to determine which processing unit most efficiently executes the instruction set. Instruction set workload processing characteristics are stored for reference in scheduling subsequent execution of the instruction set.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20180717&amp;DB=EPODOC&amp;CC=US&amp;NR=10025590B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20180717&amp;DB=EPODOC&amp;CC=US&amp;NR=10025590B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Newhart, Ronald E</creatorcontrib><creatorcontrib>Capps, Jr., Louis B</creatorcontrib><creatorcontrib>Cook, Thomas E</creatorcontrib><creatorcontrib>Bell, Jr., Robert H</creatorcontrib><creatorcontrib>Shapiro, Michael J</creatorcontrib><title>Multicore processor and method of use that configures core functions based on executing instructions</title><description>A multiprocessor system having plural heterogeneous processing units schedules instruction sets for execution on a selected of the processing units by matching workload processing characteristics of processing units and the instruction sets. To establish an instruction set's processing characteristics, the homogeneous instruction set is executed on each of the plural processing units with one or more performance metrics tracked at each of the processing units to determine which processing unit most efficiently executes the instruction set. Instruction set workload processing characteristics are stored for reference in scheduling subsequent execution of the instruction set.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNizEKwkAQRdNYiHqH8QBCjKSwVRQbK7UO6-ZvshBnws4seHxFPYDVK95706I958GilwQak3ioSiLHLT1gvbQkgbKCrHdGXjjELicofYaQ2VsUVro7xbtlwhM-W-SOIqul_PXzYhLcoFj8OCuWx8N1f1phlAY6Og-GNbfLuiyrut6Wu2rzT_MCQCc_ug</recordid><startdate>20180717</startdate><enddate>20180717</enddate><creator>Newhart, Ronald E</creator><creator>Capps, Jr., Louis B</creator><creator>Cook, Thomas E</creator><creator>Bell, Jr., Robert H</creator><creator>Shapiro, Michael J</creator><scope>EVB</scope></search><sort><creationdate>20180717</creationdate><title>Multicore processor and method of use that configures core functions based on executing instructions</title><author>Newhart, Ronald E ; Capps, Jr., Louis B ; Cook, Thomas E ; Bell, Jr., Robert H ; Shapiro, Michael J</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US10025590B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Newhart, Ronald E</creatorcontrib><creatorcontrib>Capps, Jr., Louis B</creatorcontrib><creatorcontrib>Cook, Thomas E</creatorcontrib><creatorcontrib>Bell, Jr., Robert H</creatorcontrib><creatorcontrib>Shapiro, Michael J</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Newhart, Ronald E</au><au>Capps, Jr., Louis B</au><au>Cook, Thomas E</au><au>Bell, Jr., Robert H</au><au>Shapiro, Michael J</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Multicore processor and method of use that configures core functions based on executing instructions</title><date>2018-07-17</date><risdate>2018</risdate><abstract>A multiprocessor system having plural heterogeneous processing units schedules instruction sets for execution on a selected of the processing units by matching workload processing characteristics of processing units and the instruction sets. To establish an instruction set's processing characteristics, the homogeneous instruction set is executed on each of the plural processing units with one or more performance metrics tracked at each of the processing units to determine which processing unit most efficiently executes the instruction set. Instruction set workload processing characteristics are stored for reference in scheduling subsequent execution of the instruction set.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US10025590B2
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Multicore processor and method of use that configures core functions based on executing instructions
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-12T22%3A37%3A19IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Newhart,%20Ronald%20E&rft.date=2018-07-17&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS10025590B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true