Testing apparatus and method of configuring integrated test cell

A testing apparatus comprises a test interface board comprising a plurality of socket interface boards, wherein each socket interface board comprises: a) an open socket to hold a DUT; b) a discrete active thermal interposer comprising thermal properties and operable to make thermal contact with the...

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Hauptverfasser:	CRUZAN, GREGORY, OSEGUERA, GILBERTO, GHAZVINI, MARC, SANTIAGO, KENNETH, RANGANATHAN, KARTHIK, GUPTE, ROHAN, REZAI, HOMAYOUN, KABBANI, SAMER
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS TESTING
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creator	CRUZAN, GREGORY OSEGUERA, GILBERTO GHAZVINI, MARC SANTIAGO, KENNETH RANGANATHAN, KARTHIK GUPTE, ROHAN REZAI, HOMAYOUN KABBANI, SAMER
description	A testing apparatus comprises a test interface board comprising a plurality of socket interface boards, wherein each socket interface board comprises: a) an open socket to hold a DUT; b) a discrete active thermal interposer comprising thermal properties and operable to make thermal contact with the DUT; c) a superstructure operable to contain the discrete active thermal interposer; and d) an actuation mechanism operable to provide a contact force to bring the discrete active thermal interposer in contact with the DUT.
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fullrecord	<record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_TWI795785BB</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>TWI795785BB</sourcerecordid><originalsourceid>FETCH-epo_espacenet_TWI795785BB3</originalsourceid><addsrcrecordid>eNrjZHAISS0uycxLV0gsKEgsSiwpLVZIzEtRyE0tychPUchPU0jOz0vLTC8tAqnJzCtJTQcqSk1RKAFqU0hOzcnhYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxIeGe5pam5hamTk7GRCgBAJeCMb0</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Testing apparatus and method of configuring integrated test cell</title><source>esp@cenet</source><creator>CRUZAN, GREGORY ; OSEGUERA, GILBERTO ; GHAZVINI, MARC ; SANTIAGO, KENNETH ; RANGANATHAN, KARTHIK ; GUPTE, ROHAN ; REZAI, HOMAYOUN ; KABBANI, SAMER</creator><creatorcontrib>CRUZAN, GREGORY ; OSEGUERA, GILBERTO ; GHAZVINI, MARC ; SANTIAGO, KENNETH ; RANGANATHAN, KARTHIK ; GUPTE, ROHAN ; REZAI, HOMAYOUN ; KABBANI, SAMER</creatorcontrib><description>A testing apparatus comprises a test interface board comprising a plurality of socket interface boards, wherein each socket interface board comprises: a) an open socket to hold a DUT; b) a discrete active thermal interposer comprising thermal properties and operable to make thermal contact with the DUT; c) a superstructure operable to contain the discrete active thermal interposer; and d) an actuation mechanism operable to provide a contact force to bring the discrete active thermal interposer in contact with the DUT.</description><language>chi ; eng</language><subject>MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; TESTING</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230311&DB=EPODOC&CC=TW&NR=I795785B$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230311&DB=EPODOC&CC=TW&NR=I795785B$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CRUZAN, GREGORY</creatorcontrib><creatorcontrib>OSEGUERA, GILBERTO</creatorcontrib><creatorcontrib>GHAZVINI, MARC</creatorcontrib><creatorcontrib>SANTIAGO, KENNETH</creatorcontrib><creatorcontrib>RANGANATHAN, KARTHIK</creatorcontrib><creatorcontrib>GUPTE, ROHAN</creatorcontrib><creatorcontrib>REZAI, HOMAYOUN</creatorcontrib><creatorcontrib>KABBANI, SAMER</creatorcontrib><title>Testing apparatus and method of configuring integrated test cell</title><description>A testing apparatus comprises a test interface board comprising a plurality of socket interface boards, wherein each socket interface board comprises: a) an open socket to hold a DUT; b) a discrete active thermal interposer comprising thermal properties and operable to make thermal contact with the DUT; c) a superstructure operable to contain the discrete active thermal interposer; and d) an actuation mechanism operable to provide a contact force to bring the discrete active thermal interposer in contact with the DUT.</description><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHAISS0uycxLV0gsKEgsSiwpLVZIzEtRyE0tychPUchPU0jOz0vLTC8tAqnJzCtJTQcqSk1RKAFqU0hOzcnhYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxIeGe5pam5hamTk7GRCgBAJeCMb0</recordid><startdate>20230311</startdate><enddate>20230311</enddate><creator>CRUZAN, GREGORY</creator><creator>OSEGUERA, GILBERTO</creator><creator>GHAZVINI, MARC</creator><creator>SANTIAGO, KENNETH</creator><creator>RANGANATHAN, KARTHIK</creator><creator>GUPTE, ROHAN</creator><creator>REZAI, HOMAYOUN</creator><creator>KABBANI, SAMER</creator><scope>EVB</scope></search><sort><creationdate>20230311</creationdate><title>Testing apparatus and method of configuring integrated test cell</title><author>CRUZAN, GREGORY ; OSEGUERA, GILBERTO ; GHAZVINI, MARC ; SANTIAGO, KENNETH ; RANGANATHAN, KARTHIK ; GUPTE, ROHAN ; REZAI, HOMAYOUN ; KABBANI, SAMER</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TWI795785BB3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2023</creationdate><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>CRUZAN, GREGORY</creatorcontrib><creatorcontrib>OSEGUERA, GILBERTO</creatorcontrib><creatorcontrib>GHAZVINI, MARC</creatorcontrib><creatorcontrib>SANTIAGO, KENNETH</creatorcontrib><creatorcontrib>RANGANATHAN, KARTHIK</creatorcontrib><creatorcontrib>GUPTE, ROHAN</creatorcontrib><creatorcontrib>REZAI, HOMAYOUN</creatorcontrib><creatorcontrib>KABBANI, SAMER</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CRUZAN, GREGORY</au><au>OSEGUERA, GILBERTO</au><au>GHAZVINI, MARC</au><au>SANTIAGO, KENNETH</au><au>RANGANATHAN, KARTHIK</au><au>GUPTE, ROHAN</au><au>REZAI, HOMAYOUN</au><au>KABBANI, SAMER</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Testing apparatus and method of configuring integrated test cell</title><date>2023-03-11</date><risdate>2023</risdate><abstract>A testing apparatus comprises a test interface board comprising a plurality of socket interface boards, wherein each socket interface board comprises: a) an open socket to hold a DUT; b) a discrete active thermal interposer comprising thermal properties and operable to make thermal contact with the DUT; c) a superstructure operable to contain the discrete active thermal interposer; and d) an actuation mechanism operable to provide a contact force to bring the discrete active thermal interposer in contact with the DUT.</abstract><oa>free_for_read</oa></addata></record>
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recordid	cdi_epo_espacenet_TWI795785BB
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subjects	MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS TESTING
title	Testing apparatus and method of configuring integrated test cell
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-29T19%3A33%3A53IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CRUZAN,%20GREGORY&rft.date=2023-03-11&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ETWI795785BB%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true