Memory cell, memory device and related identification tag
A memory cell includes: a latch, powered by a first reference voltage and a second reference voltage different from the first reference voltage, and having a first connecting terminal and a second connecting terminal; a first programmable fuse, having a first terminal coupled to the first connecting...
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creator | CHEN, WEN LIANG LI, OWEN YUWEN |
description | A memory cell includes: a latch, powered by a first reference voltage and a second reference voltage different from the first reference voltage, and having a first connecting terminal and a second connecting terminal; a first programmable fuse, having a first terminal coupled to the first connecting terminal and a second terminal coupled to the second reference voltage; and a second programmable fuse, having a first terminal coupled to the second connecting terminal and a second terminal coupled to the second reference voltage. |
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a first programmable fuse, having a first terminal coupled to the first connecting terminal and a second terminal coupled to the second reference voltage; and a second programmable fuse, having a first terminal coupled to the second connecting terminal and a second terminal coupled to the second reference voltage.</description><language>chi ; eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; HANDLING RECORD CARRIERS ; INFORMATION STORAGE ; PHYSICS ; PRESENTATION OF DATA ; RECOGNITION OF DATA ; RECORD CARRIERS ; STATIC STORES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20221111&DB=EPODOC&CC=TW&NR=I783450B$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20221111&DB=EPODOC&CC=TW&NR=I783450B$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHEN, WEN LIANG</creatorcontrib><creatorcontrib>LI, OWEN YUWEN</creatorcontrib><title>Memory cell, memory device and related identification tag</title><description>A memory cell includes: a latch, powered by a first reference voltage and a second reference voltage different from the first reference voltage, and having a first connecting terminal and a second connecting terminal; a first programmable fuse, having a first terminal coupled to the first connecting terminal and a second terminal coupled to the second reference voltage; and a second programmable fuse, having a first terminal coupled to the second connecting terminal and a second terminal coupled to the second reference voltage.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>HANDLING RECORD CARRIERS</subject><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>PRESENTATION OF DATA</subject><subject>RECOGNITION OF DATA</subject><subject>RECORD CARRIERS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLD0Tc3NL6pUSE7NydFRyIVwUlLLMpNTFRLzUhSKUnMSS1JTFDJTUvNKMtMykxNLMvPzFEoS03kYWNMSc4pTeaE0N4OCm2uIs4duakF-fGpxQWJyal5qSXxIuKe5hbGJqYGTkzERSgDQkC6I</recordid><startdate>20221111</startdate><enddate>20221111</enddate><creator>CHEN, WEN LIANG</creator><creator>LI, OWEN YUWEN</creator><scope>EVB</scope></search><sort><creationdate>20221111</creationdate><title>Memory cell, memory device and related identification tag</title><author>CHEN, WEN LIANG ; LI, OWEN YUWEN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TWI783450BB3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2022</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>HANDLING RECORD CARRIERS</topic><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>PRESENTATION OF DATA</topic><topic>RECOGNITION OF DATA</topic><topic>RECORD CARRIERS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>CHEN, WEN LIANG</creatorcontrib><creatorcontrib>LI, OWEN YUWEN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHEN, WEN LIANG</au><au>LI, OWEN YUWEN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Memory cell, memory device and related identification tag</title><date>2022-11-11</date><risdate>2022</risdate><abstract>A memory cell includes: a latch, powered by a first reference voltage and a second reference voltage different from the first reference voltage, and having a first connecting terminal and a second connecting terminal; a first programmable fuse, having a first terminal coupled to the first connecting terminal and a second terminal coupled to the second reference voltage; and a second programmable fuse, having a first terminal coupled to the second connecting terminal and a second terminal coupled to the second reference voltage.</abstract><oa>free_for_read</oa></addata></record> |
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language | chi ; eng |
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subjects | CALCULATING COMPUTING COUNTING HANDLING RECORD CARRIERS INFORMATION STORAGE PHYSICS PRESENTATION OF DATA RECOGNITION OF DATA RECORD CARRIERS STATIC STORES |
title | Memory cell, memory device and related identification tag |
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