TWI777662B

A reprogrammable memory cell unit structure includes a single MOSFET. The MOSFET includes a drain connected to a bit line (BL), a source connected to a select line (SL), and a gate connected to a word line (WL). A dielectric layer under the gate includes a first region and a second region adjacent to each other. The first region is a gate oxide region made of silicon dioxide (SiO2), and the second region is a region composed of oxide-nitride-oxide (ONO). A part of the gate corresponding to the first region is operated as a gate of a general MOSFET, and a part of the gate corresponding to the second region uses the nitride of ONO as a region for storing electrons and holes.