Performing folding of immediate data in a processor
In one embodiment, a processor includes a fetch logic to fetch instructions, a decode logic to decode the instructions, and an execution logic to execute at least some of the instructions. The decode logic may identify a first instruction having a first immediate value, accumulate the first immediat...
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creator | SPERBER, ZEEV RUBANOVICH, SIMON WEINER, TOMER GERBER, ALEX GRADSTEIN, AMIT |
description | In one embodiment, a processor includes a fetch logic to fetch instructions, a decode logic to decode the instructions, and an execution logic to execute at least some of the instructions. The decode logic may identify a first instruction having a first immediate value, accumulate the first immediate value with a folded immediate value associated with a first operand of the first instruction, and prevent the first instruction from provision to the execution logic, such that the first instruction is not to be executed within the execution logic. Other embodiments are described and claimed. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_TWI773652BB</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>TWI773652BB</sourcerecordid><originalsourceid>FETCH-epo_espacenet_TWI773652BB3</originalsourceid><addsrcrecordid>eNrjZDAOSC1Kyy_KzcxLV0jLz0kB0flpCpm5uakpmYklqQopiSWJCpl5CokKBUX5yanFxflFPAysaYk5xam8UJqbQcHNNcTZQze1ID8-tbggMTk1L7UkPiTc09zc2MzUyMnJmAglAJ7QLFI</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Performing folding of immediate data in a processor</title><source>esp@cenet</source><creator>SPERBER, ZEEV ; RUBANOVICH, SIMON ; WEINER, TOMER ; GERBER, ALEX ; GRADSTEIN, AMIT</creator><creatorcontrib>SPERBER, ZEEV ; RUBANOVICH, SIMON ; WEINER, TOMER ; GERBER, ALEX ; GRADSTEIN, AMIT</creatorcontrib><description>In one embodiment, a processor includes a fetch logic to fetch instructions, a decode logic to decode the instructions, and an execution logic to execute at least some of the instructions. The decode logic may identify a first instruction having a first immediate value, accumulate the first immediate value with a folded immediate value associated with a first operand of the first instruction, and prevent the first instruction from provision to the execution logic, such that the first instruction is not to be executed within the execution logic. Other embodiments are described and claimed.</description><language>chi ; eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220811&DB=EPODOC&CC=TW&NR=I773652B$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220811&DB=EPODOC&CC=TW&NR=I773652B$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SPERBER, ZEEV</creatorcontrib><creatorcontrib>RUBANOVICH, SIMON</creatorcontrib><creatorcontrib>WEINER, TOMER</creatorcontrib><creatorcontrib>GERBER, ALEX</creatorcontrib><creatorcontrib>GRADSTEIN, AMIT</creatorcontrib><title>Performing folding of immediate data in a processor</title><description>In one embodiment, a processor includes a fetch logic to fetch instructions, a decode logic to decode the instructions, and an execution logic to execute at least some of the instructions. The decode logic may identify a first instruction having a first immediate value, accumulate the first immediate value with a folded immediate value associated with a first operand of the first instruction, and prevent the first instruction from provision to the execution logic, such that the first instruction is not to be executed within the execution logic. Other embodiments are described and claimed.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAOSC1Kyy_KzcxLV0jLz0kB0flpCpm5uakpmYklqQopiSWJCpl5CokKBUX5yanFxflFPAysaYk5xam8UJqbQcHNNcTZQze1ID8-tbggMTk1L7UkPiTc09zc2MzUyMnJmAglAJ7QLFI</recordid><startdate>20220811</startdate><enddate>20220811</enddate><creator>SPERBER, ZEEV</creator><creator>RUBANOVICH, SIMON</creator><creator>WEINER, TOMER</creator><creator>GERBER, ALEX</creator><creator>GRADSTEIN, AMIT</creator><scope>EVB</scope></search><sort><creationdate>20220811</creationdate><title>Performing folding of immediate data in a processor</title><author>SPERBER, ZEEV ; RUBANOVICH, SIMON ; WEINER, TOMER ; GERBER, ALEX ; GRADSTEIN, AMIT</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TWI773652BB3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2022</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>SPERBER, ZEEV</creatorcontrib><creatorcontrib>RUBANOVICH, SIMON</creatorcontrib><creatorcontrib>WEINER, TOMER</creatorcontrib><creatorcontrib>GERBER, ALEX</creatorcontrib><creatorcontrib>GRADSTEIN, AMIT</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SPERBER, ZEEV</au><au>RUBANOVICH, SIMON</au><au>WEINER, TOMER</au><au>GERBER, ALEX</au><au>GRADSTEIN, AMIT</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Performing folding of immediate data in a processor</title><date>2022-08-11</date><risdate>2022</risdate><abstract>In one embodiment, a processor includes a fetch logic to fetch instructions, a decode logic to decode the instructions, and an execution logic to execute at least some of the instructions. The decode logic may identify a first instruction having a first immediate value, accumulate the first immediate value with a folded immediate value associated with a first operand of the first instruction, and prevent the first instruction from provision to the execution logic, such that the first instruction is not to be executed within the execution logic. Other embodiments are described and claimed.</abstract><oa>free_for_read</oa></addata></record> |
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language | chi ; eng |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | Performing folding of immediate data in a processor |
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