Surface-optimised transistor with superlattice structures

Surface-optimised transistor with superlattice structures

A transistor, including a substrate of a first doping type; an epitaxy layer of the first doping type above the substrate; a channel layer of a second doping type, differing from the first doping type, above the epitaxy layer; a plurality of trenches in the channel layer, which have a gate electrode...

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Hauptverfasser: RAMBACH, MARTIN, BANZHAF, CHRISTIAN TOBIAS, JACKE, THOMAS, GRIEB, MICHAEL
Format: Patent
Sprache:chi ; eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator RAMBACH, MARTIN
BANZHAF, CHRISTIAN TOBIAS
JACKE, THOMAS
GRIEB, MICHAEL
description A transistor, including a substrate of a first doping type; an epitaxy layer of the first doping type above the substrate; a channel layer of a second doping type, differing from the first doping type, above the epitaxy layer; a plurality of trenches in the channel layer, which have a gate electrode situated below the trenches and are bordered by a source terminal of the first doping type above the channel layer; a plurality of shielding areas of the second doping type, which are situated below the gate electrode. The shielding areas are guided below the trenches together in a interconnection of shielding areas, and several shielding areas are jointly guided to terminals for contacting the shielding areas.
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Surface-optimised transistor with superlattice structures
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