Vnand tensile thick teos oxide

Embodiments of the present disclosure generally relate to an improved method for forming a dielectric film stack used for inter-level dielectric (ILD) layers in a 3D NAND structure. In one embodiment, the method comprises providing a substrate having a gate stack deposited thereon, forming on expose...

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Bibliographische Detailangaben

Hauptverfasser:	SHAHREZA, MAJID K, KIM, BOK HOEN, KIM, RYEUN KWAN, JU, MYUNG HUN, KULKARNI, MAYUR G, SON, JIN CHUL, TSIANG, MICHAEL WENYOUNG, BALUJA, SANJEEV, FOSTER, JASON K, HAN, XINHAI, KIM, SANG HYUK, JHA, PRAKET P, PARK, HYUNG JIN, GNANAVELU, SAIPRASANNA
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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