Electrical interconnect structure for an embedded semiconductor device package and method of manufacturing thereof

An electronics package includes a first dielectric substrate (34) having a first plurality of vias (50) formed through a thickness thereof, a metalized contact layer (48) coupled to a top surface (40) of the first dielectric substrate (34), and a first die (68) positioned within a first die opening...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	MCCONNELEE, PAUL ALAN, GOWDA, ARUN VIRUPAKSHA
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
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