Chained bus method and device

Memory devices and methods are described and shown that are capable of being configured in a chain. In one configuration, a single data input port and a single data output port are utilized at a host to communicate with the chain of memory devices. Methods for assigning identifiers to memory devices...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	TSAI, VICTOR, RADKE, WILLIAM HENRY, LEIBOWITZ, BOB
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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