Interface circuit

An interface circuit according to one aspect of the present invention may include a receiving circuit operating on a supply voltage lower than a high-level voltage value of an input binary signal, an input level determination circuit generating an input level determination signal having a frequency...

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1. Verfasser: INOSE, HIROSHI
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creator INOSE, HIROSHI
description An interface circuit according to one aspect of the present invention may include a receiving circuit operating on a supply voltage lower than a high-level voltage value of an input binary signal, an input level determination circuit generating an input level determination signal having a frequency higher than a frequency of the binary signal and controls whether to output the input level determination signal or not, based on a voltage level of the binary signal, and an AC coupling element connected between an output terminal of the input level determination circuit and an input terminal of the receiving circuit.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_TWI381637BB</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>TWI381637BB</sourcerecordid><originalsourceid>FETCH-epo_espacenet_TWI381637BB3</originalsourceid><addsrcrecordid>eNrjZBD0zCtJLUpLTE5VSM4sSi7NLOFhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBUCleakl8SHhnsYWhmbG5k5OxkQoAQCjsh--</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Interface circuit</title><source>esp@cenet</source><creator>INOSE, HIROSHI</creator><creatorcontrib>INOSE, HIROSHI</creatorcontrib><description>An interface circuit according to one aspect of the present invention may include a receiving circuit operating on a supply voltage lower than a high-level voltage value of an input binary signal, an input level determination circuit generating an input level determination signal having a frequency higher than a frequency of the binary signal and controls whether to output the input level determination signal or not, based on a voltage level of the binary signal, and an AC coupling element connected between an output terminal of the input level determination circuit and an input terminal of the receiving circuit.</description><language>chi ; eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY ; PULSE TECHNIQUE</subject><creationdate>2013</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20130101&amp;DB=EPODOC&amp;CC=TW&amp;NR=I381637B$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20130101&amp;DB=EPODOC&amp;CC=TW&amp;NR=I381637B$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>INOSE, HIROSHI</creatorcontrib><title>Interface circuit</title><description>An interface circuit according to one aspect of the present invention may include a receiving circuit operating on a supply voltage lower than a high-level voltage value of an input binary signal, an input level determination circuit generating an input level determination signal having a frequency higher than a frequency of the binary signal and controls whether to output the input level determination signal or not, based on a voltage level of the binary signal, and an AC coupling element connected between an output terminal of the input level determination circuit and an input terminal of the receiving circuit.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><subject>PULSE TECHNIQUE</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2013</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBD0zCtJLUpLTE5VSM4sSi7NLOFhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBUCleakl8SHhnsYWhmbG5k5OxkQoAQCjsh--</recordid><startdate>20130101</startdate><enddate>20130101</enddate><creator>INOSE, HIROSHI</creator><scope>EVB</scope></search><sort><creationdate>20130101</creationdate><title>Interface circuit</title><author>INOSE, HIROSHI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TWI381637BB3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2013</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><topic>PULSE TECHNIQUE</topic><toplevel>online_resources</toplevel><creatorcontrib>INOSE, HIROSHI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>INOSE, HIROSHI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Interface circuit</title><date>2013-01-01</date><risdate>2013</risdate><abstract>An interface circuit according to one aspect of the present invention may include a receiving circuit operating on a supply voltage lower than a high-level voltage value of an input binary signal, an input level determination circuit generating an input level determination signal having a frequency higher than a frequency of the binary signal and controls whether to output the input level determination signal or not, based on a voltage level of the binary signal, and an AC coupling element connected between an output terminal of the input level determination circuit and an input terminal of the receiving circuit.</abstract><oa>free_for_read</oa></addata></record>
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language chi ; eng
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subjects BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
title Interface circuit
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-19T05%3A42%3A37IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=INOSE,%20HIROSHI&rft.date=2013-01-01&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ETWI381637BB%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true