Etch process for dielectric materials comprising oxidized organo silane materials

The present invention provides a novel etching technique for etching a layer of C-doped silicon oxide, such as a partially oxidized organo silane material. This technique, employing CH2F2/Ar chemistry at low bias and low to intermediate pressure, provides high etch selectivity to silicon oxide and improved selectivity to organic photoresist. Structures including a layer of partially oxidized organo silane material (1004) deposited on a layer of silicon oxide (1002) were etched according to the novel technique, forming relatively narrow trenches (1010, 1012, 1014, 1016, 1030, 1032, 1034 and 1036) and wider trenches (1020, 1022, 1040 and 1042). The technique is also suitable for forming dual damascene structures (1152, 1154 and 1156). In additional embodiments, manufacturing systems (1410) are provided for fabricating IC structures of the present invention. These systems include a controller (1400) that is adapted for interacting with a plurality of fabricating stations (1420, 1422, 1424, 1426 and 1428).