Method of making a parallel plate capacitor in an integrated circuit employing copper interconnects

A parallel plate capacitor in copper technology is formed in an area that has no copper below it (within 0.3 mum) with a bottom etch stop layer, a composite bottom plate having an aluminum layer below a TiN layer, an oxide capacitor dielectric, and a top plate of TiN; in a process that involves etch...

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Bibliographische Detailangaben
Hauptverfasser: AUGUSTIN, ANDREAS K, FRIESE, GERALD R, ARMACOST, MICHAEL D, HEIDENREICH III, JOHN E, HUECKEL, GARY R.
Format: Patent
Sprache:eng
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