Semiconductor memory device which controls sense amplifier for detecting bit line bridge and method of controlling the semiconductor memory device

In a sense amplifier control circuit and method for a semiconductor memory device, a row address strobe (RAS) signal delay unit delays a RAS signal for a predetermined period of time. A sense amplifier control signal generator generates first and second sense amplifier control signals, responsive to...

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Bibliographische Detailangaben
Hauptverfasser: JUN, SUK-BAE, PARK, CHOONG-SUN, LEE, HYONG-YONG
Format: Patent
Sprache:eng
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