A data processing system having an apparatus for exception tracking during out-of-order operation and method therefor

An apparatus for integer exception register (XER) renaming and methods of using the same are implemented. In a central processing unit (CPU) having a pipelined architecture, integer instructions that use or update the XER may be executed out-of-order using the XER renaming mechanism. Any instruction...

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Bibliographische Detailangaben

Hauptverfasser:	WILLIAMS, ALBERT THOMAS, FRY, RICHARD EDMUND, NGUYEN, DOUG QUOC
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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