Semiconductor deivce and process for producing the same

A semiconductor device having a highly reliable groove isolation structure with a desired radius of curvature formed at the groove upper edge and without formation of any step, there is produced by reducing the stress generation around the groove upper edge of an element isolation groove on a semico...

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Hauptverfasser:	KOBAYASHI, MASAMICHI, MIURA, HIDEO, FUKUDA, KAZUSHI, YAMAMOTO, HIROHIKO, IKEDA, SHUJI
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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creator	KOBAYASHI, MASAMICHI MIURA, HIDEO FUKUDA, KAZUSHI YAMAMOTO, HIROHIKO IKEDA, SHUJI
description	A semiconductor device having a highly reliable groove isolation structure with a desired radius of curvature formed at the groove upper edge and without formation of any step, there is produced by reducing the stress generation around the groove upper edge of an element isolation groove on a semiconductor substrate, thereby optimizing the shape of an element isolation groove and making the device finer and improving the device electric characteristics.
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fullrecord	<record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_TW388100BB</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>TW388100BB</sourcerecordid><originalsourceid>FETCH-epo_espacenet_TW388100BB3</originalsourceid><addsrcrecordid>eNrjZDAPTs3NTM7PSylNLskvUkhJzSxLTlVIzEtRKCjKT04tLlZIAwoD2UAFmXnpCiUZqQrFibmpPAysaYk5xam8UJqbQd7NNcTZQze1ID8-tbggMTk1L7UkPiTc2MLC0MDAycmYsAoAODMtdg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor deivce and process for producing the same</title><source>esp@cenet</source><creator>KOBAYASHI, MASAMICHI ; MIURA, HIDEO ; FUKUDA, KAZUSHI ; YAMAMOTO, HIROHIKO ; IKEDA, SHUJI</creator><creatorcontrib>KOBAYASHI, MASAMICHI ; MIURA, HIDEO ; FUKUDA, KAZUSHI ; YAMAMOTO, HIROHIKO ; IKEDA, SHUJI</creatorcontrib><description>A semiconductor device having a highly reliable groove isolation structure with a desired radius of curvature formed at the groove upper edge and without formation of any step, there is produced by reducing the stress generation around the groove upper edge of an element isolation groove on a semiconductor substrate, thereby optimizing the shape of an element isolation groove and making the device finer and improving the device electric characteristics.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2000</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20000421&DB=EPODOC&CC=TW&NR=388100B$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20000421&DB=EPODOC&CC=TW&NR=388100B$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KOBAYASHI, MASAMICHI</creatorcontrib><creatorcontrib>MIURA, HIDEO</creatorcontrib><creatorcontrib>FUKUDA, KAZUSHI</creatorcontrib><creatorcontrib>YAMAMOTO, HIROHIKO</creatorcontrib><creatorcontrib>IKEDA, SHUJI</creatorcontrib><title>Semiconductor deivce and process for producing the same</title><description>A semiconductor device having a highly reliable groove isolation structure with a desired radius of curvature formed at the groove upper edge and without formation of any step, there is produced by reducing the stress generation around the groove upper edge of an element isolation groove on a semiconductor substrate, thereby optimizing the shape of an element isolation groove and making the device finer and improving the device electric characteristics.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2000</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAPTs3NTM7PSylNLskvUkhJzSxLTlVIzEtRKCjKT04tLlZIAwoD2UAFmXnpCiUZqQrFibmpPAysaYk5xam8UJqbQd7NNcTZQze1ID8-tbggMTk1L7UkPiTc2MLC0MDAycmYsAoAODMtdg</recordid><startdate>20000421</startdate><enddate>20000421</enddate><creator>KOBAYASHI, MASAMICHI</creator><creator>MIURA, HIDEO</creator><creator>FUKUDA, KAZUSHI</creator><creator>YAMAMOTO, HIROHIKO</creator><creator>IKEDA, SHUJI</creator><scope>EVB</scope></search><sort><creationdate>20000421</creationdate><title>Semiconductor deivce and process for producing the same</title><author>KOBAYASHI, MASAMICHI ; MIURA, HIDEO ; FUKUDA, KAZUSHI ; YAMAMOTO, HIROHIKO ; IKEDA, SHUJI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TW388100BB3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2000</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>KOBAYASHI, MASAMICHI</creatorcontrib><creatorcontrib>MIURA, HIDEO</creatorcontrib><creatorcontrib>FUKUDA, KAZUSHI</creatorcontrib><creatorcontrib>YAMAMOTO, HIROHIKO</creatorcontrib><creatorcontrib>IKEDA, SHUJI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KOBAYASHI, MASAMICHI</au><au>MIURA, HIDEO</au><au>FUKUDA, KAZUSHI</au><au>YAMAMOTO, HIROHIKO</au><au>IKEDA, SHUJI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor deivce and process for producing the same</title><date>2000-04-21</date><risdate>2000</risdate><abstract>A semiconductor device having a highly reliable groove isolation structure with a desired radius of curvature formed at the groove upper edge and without formation of any step, there is produced by reducing the stress generation around the groove upper edge of an element isolation groove on a semiconductor substrate, thereby optimizing the shape of an element isolation groove and making the device finer and improving the device electric characteristics.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
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subjects	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
title	Semiconductor deivce and process for producing the same
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-05T03%3A54%3A17IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=KOBAYASHI,%20MASAMICHI&rft.date=2000-04-21&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ETW388100BB%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true