Semiconductor wafer having alignment marks for a tungsten plug process and a method of manufacture therefore
The present invention provides a semiconductor wafer having a substrate with an active region and an inactive region located therein and that comprises a dielectric substrate located over the active and inactive regions, and an alignment mark located in the dielectric substrate over the inactive reg...
Gespeichert in:
| Hauptverfasser: | , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | WILLIAMS, JOHN DALE STONE, DOUGLAS ROY RYAN, JOHN L LIU, RUICHEN YANG, TUNGSHENG |
| description | The present invention provides a semiconductor wafer having a substrate with an active region and an inactive region located therein and that comprises a dielectric substrate located over the active and inactive regions, and an alignment mark located in the dielectric substrate over the inactive region wherein the alignment mark comprises a plurality of discrete induvidual marks that cooperate to form a perimeter of the alignment mark. Thus, the discrete individual marks can allow for more reliable deposition within the marks and substantially reduce the possibility of contaminants during the fabrication process. Moreover, this particular embodiment provides a mark that can be read by a stepper when a metal stack is formed on a polished metal, such as tungsten. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_TW387108BB</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>TW387108BB</sourcerecordid><originalsourceid>FETCH-epo_espacenet_TW387108BB3</originalsourceid><addsrcrecordid>eNqFizsOwjAQBdNQIOAM7AWQQClIHQSiJxJltHKenQh7bfkD18cFPdUUM7Nu7ANuUV6morKP9GGNSDO_FzHEdjHiIJkcx1ciXQOmXMSkDKFgi6EQvUJKxDJV55BnP5HX9ZCiWeUSQXlGRJ2xbVaabcLux02zv12Hy_2A4EekwAqCPA7Ptjufjl3ft_-LL2KOQa0</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor wafer having alignment marks for a tungsten plug process and a method of manufacture therefore</title><source>esp@cenet</source><creator>WILLIAMS, JOHN DALE ; STONE, DOUGLAS ROY ; RYAN, JOHN L ; LIU, RUICHEN ; YANG, TUNGSHENG</creator><creatorcontrib>WILLIAMS, JOHN DALE ; STONE, DOUGLAS ROY ; RYAN, JOHN L ; LIU, RUICHEN ; YANG, TUNGSHENG</creatorcontrib><description>The present invention provides a semiconductor wafer having a substrate with an active region and an inactive region located therein and that comprises a dielectric substrate located over the active and inactive regions, and an alignment mark located in the dielectric substrate over the inactive region wherein the alignment mark comprises a plurality of discrete induvidual marks that cooperate to form a perimeter of the alignment mark. Thus, the discrete individual marks can allow for more reliable deposition within the marks and substantially reduce the possibility of contaminants during the fabrication process. Moreover, this particular embodiment provides a mark that can be read by a stepper when a metal stack is formed on a polished metal, such as tungsten.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2000</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20000411&DB=EPODOC&CC=TW&NR=387108B$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20000411&DB=EPODOC&CC=TW&NR=387108B$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>WILLIAMS, JOHN DALE</creatorcontrib><creatorcontrib>STONE, DOUGLAS ROY</creatorcontrib><creatorcontrib>RYAN, JOHN L</creatorcontrib><creatorcontrib>LIU, RUICHEN</creatorcontrib><creatorcontrib>YANG, TUNGSHENG</creatorcontrib><title>Semiconductor wafer having alignment marks for a tungsten plug process and a method of manufacture therefore</title><description>The present invention provides a semiconductor wafer having a substrate with an active region and an inactive region located therein and that comprises a dielectric substrate located over the active and inactive regions, and an alignment mark located in the dielectric substrate over the inactive region wherein the alignment mark comprises a plurality of discrete induvidual marks that cooperate to form a perimeter of the alignment mark. Thus, the discrete individual marks can allow for more reliable deposition within the marks and substantially reduce the possibility of contaminants during the fabrication process. Moreover, this particular embodiment provides a mark that can be read by a stepper when a metal stack is formed on a polished metal, such as tungsten.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2000</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqFizsOwjAQBdNQIOAM7AWQQClIHQSiJxJltHKenQh7bfkD18cFPdUUM7Nu7ANuUV6morKP9GGNSDO_FzHEdjHiIJkcx1ciXQOmXMSkDKFgi6EQvUJKxDJV55BnP5HX9ZCiWeUSQXlGRJ2xbVaabcLux02zv12Hy_2A4EekwAqCPA7Ptjufjl3ft_-LL2KOQa0</recordid><startdate>20000411</startdate><enddate>20000411</enddate><creator>WILLIAMS, JOHN DALE</creator><creator>STONE, DOUGLAS ROY</creator><creator>RYAN, JOHN L</creator><creator>LIU, RUICHEN</creator><creator>YANG, TUNGSHENG</creator><scope>EVB</scope></search><sort><creationdate>20000411</creationdate><title>Semiconductor wafer having alignment marks for a tungsten plug process and a method of manufacture therefore</title><author>WILLIAMS, JOHN DALE ; STONE, DOUGLAS ROY ; RYAN, JOHN L ; LIU, RUICHEN ; YANG, TUNGSHENG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TW387108BB3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2000</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>WILLIAMS, JOHN DALE</creatorcontrib><creatorcontrib>STONE, DOUGLAS ROY</creatorcontrib><creatorcontrib>RYAN, JOHN L</creatorcontrib><creatorcontrib>LIU, RUICHEN</creatorcontrib><creatorcontrib>YANG, TUNGSHENG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>WILLIAMS, JOHN DALE</au><au>STONE, DOUGLAS ROY</au><au>RYAN, JOHN L</au><au>LIU, RUICHEN</au><au>YANG, TUNGSHENG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor wafer having alignment marks for a tungsten plug process and a method of manufacture therefore</title><date>2000-04-11</date><risdate>2000</risdate><abstract>The present invention provides a semiconductor wafer having a substrate with an active region and an inactive region located therein and that comprises a dielectric substrate located over the active and inactive regions, and an alignment mark located in the dielectric substrate over the inactive region wherein the alignment mark comprises a plurality of discrete induvidual marks that cooperate to form a perimeter of the alignment mark. Thus, the discrete individual marks can allow for more reliable deposition within the marks and substantially reduce the possibility of contaminants during the fabrication process. Moreover, this particular embodiment provides a mark that can be read by a stepper when a metal stack is formed on a polished metal, such as tungsten.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_TW387108BB |
| source | esp@cenet |
| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Semiconductor wafer having alignment marks for a tungsten plug process and a method of manufacture therefore |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-20T14%3A24%3A14IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=WILLIAMS,%20JOHN%20DALE&rft.date=2000-04-11&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ETW387108BB%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |