Processor based bist for an embedded memory

An integrated chip having a DRAM embedded in logic is tested by an in-situ processor oriented BIST macro. The BIST is provided with two ROMs, one for storing test instructions and a second, which is scannable, that provides sequencing for the test instructions stored in the first ROM, as well as bra...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	KALTER, HOWARD LEO, BARTH, JOHN EDWARD JR, MORI, YOTARO, JOHN STUART PARENTEAU, JR, DREIBELBIS, JEFFREY HARRIS, KHO, REX NGO, DONALD LAWRENCE WHEATER
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS STATIC STORES TESTING
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