Apparatuses for backside wafer processing with edge-only wafer contact

Semiconductor processing tools with wafer back-side processing capabilities are disclosed. Such tools may be configured to only contact wafers being processed through edge contact, as opposed to underside/planar contact. Such tools may also include wafer-centering features that may allow such wafers...

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Hauptverfasser: DIXON, ERIC THOMAS, ARCURI, CONOR CHARLES, JANICKI, MICHAEL JOHN, LINEBARGER JR., NICK RAY, BLANK, RICHARD M, SHAIKH, FAYAZ A, VINTILA, ADRIANA, BOATRIGHT, DANIEL, YIN, XIN
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creator DIXON, ERIC THOMAS
ARCURI, CONOR CHARLES
JANICKI, MICHAEL JOHN
LINEBARGER JR., NICK RAY
BLANK, RICHARD M
SHAIKH, FAYAZ A
VINTILA, ADRIANA
BOATRIGHT, DANIEL
YIN, XIN
description Semiconductor processing tools with wafer back-side processing capabilities are disclosed. Such tools may be configured to only contact wafers being processed through edge contact, as opposed to underside/planar contact. Such tools may also include wafer-centering features that may allow such wafers to be precisely centered with regard to a particular wafer processing station thereof.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_TW202410279A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>TW202410279A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_TW202410279A3</originalsourceid><addsrcrecordid>eNrjZHBzLChILEosKS1OLVZIyy9SSEpMzi7OTElVKE9MSy1SKCjKT04tLs7MS1cozyzJUEhNSU_Vzc_LqYTKJ-fnlSQml_AwsKYl5hSn8kJpbgZFN9cQZw_d1IL8-NTigsTk1LzUkviQcCMDIxNDAyNzS0djYtQAAFD4M_A</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Apparatuses for backside wafer processing with edge-only wafer contact</title><source>esp@cenet</source><creator>DIXON, ERIC THOMAS ; ARCURI, CONOR CHARLES ; JANICKI, MICHAEL JOHN ; LINEBARGER JR., NICK RAY ; BLANK, RICHARD M ; SHAIKH, FAYAZ A ; VINTILA, ADRIANA ; BOATRIGHT, DANIEL ; YIN, XIN</creator><creatorcontrib>DIXON, ERIC THOMAS ; ARCURI, CONOR CHARLES ; JANICKI, MICHAEL JOHN ; LINEBARGER JR., NICK RAY ; BLANK, RICHARD M ; SHAIKH, FAYAZ A ; VINTILA, ADRIANA ; BOATRIGHT, DANIEL ; YIN, XIN</creatorcontrib><description>Semiconductor processing tools with wafer back-side processing capabilities are disclosed. Such tools may be configured to only contact wafers being processed through edge contact, as opposed to underside/planar contact. Such tools may also include wafer-centering features that may allow such wafers to be precisely centered with regard to a particular wafer processing station thereof.</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; CHEMICAL SURFACE TREATMENT ; CHEMISTRY ; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL ; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL ; COATING MATERIAL WITH METALLIC MATERIAL ; COATING METALLIC MATERIAL ; DIFFUSION TREATMENT OF METALLIC MATERIAL ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL ; METALLURGY ; SEMICONDUCTOR DEVICES ; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240301&amp;DB=EPODOC&amp;CC=TW&amp;NR=202410279A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240301&amp;DB=EPODOC&amp;CC=TW&amp;NR=202410279A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>DIXON, ERIC THOMAS</creatorcontrib><creatorcontrib>ARCURI, CONOR CHARLES</creatorcontrib><creatorcontrib>JANICKI, MICHAEL JOHN</creatorcontrib><creatorcontrib>LINEBARGER JR., NICK RAY</creatorcontrib><creatorcontrib>BLANK, RICHARD M</creatorcontrib><creatorcontrib>SHAIKH, FAYAZ A</creatorcontrib><creatorcontrib>VINTILA, ADRIANA</creatorcontrib><creatorcontrib>BOATRIGHT, DANIEL</creatorcontrib><creatorcontrib>YIN, XIN</creatorcontrib><title>Apparatuses for backside wafer processing with edge-only wafer contact</title><description>Semiconductor processing tools with wafer back-side processing capabilities are disclosed. Such tools may be configured to only contact wafers being processed through edge contact, as opposed to underside/planar contact. Such tools may also include wafer-centering features that may allow such wafers to be precisely centered with regard to a particular wafer processing station thereof.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CHEMICAL SURFACE TREATMENT</subject><subject>CHEMISTRY</subject><subject>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</subject><subject>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</subject><subject>COATING MATERIAL WITH METALLIC MATERIAL</subject><subject>COATING METALLIC MATERIAL</subject><subject>DIFFUSION TREATMENT OF METALLIC MATERIAL</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL</subject><subject>METALLURGY</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHBzLChILEosKS1OLVZIyy9SSEpMzi7OTElVKE9MSy1SKCjKT04tLs7MS1cozyzJUEhNSU_Vzc_LqYTKJ-fnlSQml_AwsKYl5hSn8kJpbgZFN9cQZw_d1IL8-NTigsTk1LzUkviQcCMDIxNDAyNzS0djYtQAAFD4M_A</recordid><startdate>20240301</startdate><enddate>20240301</enddate><creator>DIXON, ERIC THOMAS</creator><creator>ARCURI, CONOR CHARLES</creator><creator>JANICKI, MICHAEL JOHN</creator><creator>LINEBARGER JR., NICK RAY</creator><creator>BLANK, RICHARD M</creator><creator>SHAIKH, FAYAZ A</creator><creator>VINTILA, ADRIANA</creator><creator>BOATRIGHT, DANIEL</creator><creator>YIN, XIN</creator><scope>EVB</scope></search><sort><creationdate>20240301</creationdate><title>Apparatuses for backside wafer processing with edge-only wafer contact</title><author>DIXON, ERIC THOMAS ; ARCURI, CONOR CHARLES ; JANICKI, MICHAEL JOHN ; LINEBARGER JR., NICK RAY ; BLANK, RICHARD M ; SHAIKH, FAYAZ A ; VINTILA, ADRIANA ; BOATRIGHT, DANIEL ; YIN, XIN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TW202410279A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CHEMICAL SURFACE TREATMENT</topic><topic>CHEMISTRY</topic><topic>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</topic><topic>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</topic><topic>COATING MATERIAL WITH METALLIC MATERIAL</topic><topic>COATING METALLIC MATERIAL</topic><topic>DIFFUSION TREATMENT OF METALLIC MATERIAL</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL</topic><topic>METALLURGY</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION</topic><toplevel>online_resources</toplevel><creatorcontrib>DIXON, ERIC THOMAS</creatorcontrib><creatorcontrib>ARCURI, CONOR CHARLES</creatorcontrib><creatorcontrib>JANICKI, MICHAEL JOHN</creatorcontrib><creatorcontrib>LINEBARGER JR., NICK RAY</creatorcontrib><creatorcontrib>BLANK, RICHARD M</creatorcontrib><creatorcontrib>SHAIKH, FAYAZ A</creatorcontrib><creatorcontrib>VINTILA, ADRIANA</creatorcontrib><creatorcontrib>BOATRIGHT, DANIEL</creatorcontrib><creatorcontrib>YIN, XIN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>DIXON, ERIC THOMAS</au><au>ARCURI, CONOR CHARLES</au><au>JANICKI, MICHAEL JOHN</au><au>LINEBARGER JR., NICK RAY</au><au>BLANK, RICHARD M</au><au>SHAIKH, FAYAZ A</au><au>VINTILA, ADRIANA</au><au>BOATRIGHT, DANIEL</au><au>YIN, XIN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Apparatuses for backside wafer processing with edge-only wafer contact</title><date>2024-03-01</date><risdate>2024</risdate><abstract>Semiconductor processing tools with wafer back-side processing capabilities are disclosed. Such tools may be configured to only contact wafers being processed through edge contact, as opposed to underside/planar contact. Such tools may also include wafer-centering features that may allow such wafers to be precisely centered with regard to a particular wafer processing station thereof.</abstract><oa>free_for_read</oa></addata></record>
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language chi ; eng
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subjects BASIC ELECTRIC ELEMENTS
CHEMICAL SURFACE TREATMENT
CHEMISTRY
COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
COATING MATERIAL WITH METALLIC MATERIAL
COATING METALLIC MATERIAL
DIFFUSION TREATMENT OF METALLIC MATERIAL
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL
METALLURGY
SEMICONDUCTOR DEVICES
SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION
title Apparatuses for backside wafer processing with edge-only wafer contact
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-02T00%3A52%3A02IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=DIXON,%20ERIC%20THOMAS&rft.date=2024-03-01&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ETW202410279A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true