Method for producing printed wiring board
After laminating an insulation layer (14) and an electrolytic copper foil (15) in this order on an inner layer board (13), a resist pattern (17B) is formed on the electrolytic copper foil (15). Next, using the resist pattern (17B) as an etching resist, the electrolytic copper foil (15) is etched usi...
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| creator | MUTO, TOMOHIRO NOHARA, KIMIYUKI KAIMORI, YOSHIYASU KITAMURA, SHINYA SATO, TOSHINORI |
| description | After laminating an insulation layer (14) and an electrolytic copper foil (15) in this order on an inner layer board (13), a resist pattern (17B) is formed on the electrolytic copper foil (15). Next, using the resist pattern (17B) as an etching resist, the electrolytic copper foil (15) is etched using an etching liquid containing sulfuric acid and hydrogen peroxide, and a mask for via hole formation (18) is formed. Subsequently, the resist pattern (17B) is removed, the part of the insulation layer (14) not covered by the mask for via hole formation (18) is removed using a laser, and via holes (14A) are formed. |
| format | Patent |
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Next, using the resist pattern (17B) as an etching resist, the electrolytic copper foil (15) is etched using an etching liquid containing sulfuric acid and hydrogen peroxide, and a mask for via hole formation (18) is formed. Subsequently, the resist pattern (17B) is removed, the part of the insulation layer (14) not covered by the mask for via hole formation (18) is removed using a laser, and via holes (14A) are formed.</description><language>chi ; eng</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; CHEMICAL SURFACE TREATMENT ; CHEMISTRY ; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL ; COATING MATERIAL WITH METALLIC MATERIAL ; COATING METALLIC MATERIAL ; DIFFUSION TREATMENT OF METALLIC MATERIAL ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; METALLURGY ; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLICMATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASSC23 AND AT LEAST ONEPROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25 ; NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE ; PRINTED CIRCUITS</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240216&DB=EPODOC&CC=TW&NR=202408335A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240216&DB=EPODOC&CC=TW&NR=202408335A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MUTO, TOMOHIRO</creatorcontrib><creatorcontrib>NOHARA, KIMIYUKI</creatorcontrib><creatorcontrib>KAIMORI, YOSHIYASU</creatorcontrib><creatorcontrib>KITAMURA, SHINYA</creatorcontrib><creatorcontrib>SATO, TOSHINORI</creatorcontrib><title>Method for producing printed wiring board</title><description>After laminating an insulation layer (14) and an electrolytic copper foil (15) in this order on an inner layer board (13), a resist pattern (17B) is formed on the electrolytic copper foil (15). Next, using the resist pattern (17B) as an etching resist, the electrolytic copper foil (15) is etched using an etching liquid containing sulfuric acid and hydrogen peroxide, and a mask for via hole formation (18) is formed. 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Next, using the resist pattern (17B) as an etching resist, the electrolytic copper foil (15) is etched using an etching liquid containing sulfuric acid and hydrogen peroxide, and a mask for via hole formation (18) is formed. Subsequently, the resist pattern (17B) is removed, the part of the insulation layer (14) not covered by the mask for via hole formation (18) is removed using a laser, and via holes (14A) are formed.</abstract><oa>free_for_read</oa></addata></record> |
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| language | chi ; eng |
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| subjects | CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS CHEMICAL SURFACE TREATMENT CHEMISTRY COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING MATERIAL WITH METALLIC MATERIAL COATING METALLIC MATERIAL DIFFUSION TREATMENT OF METALLIC MATERIAL ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS METALLURGY MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLICMATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASSC23 AND AT LEAST ONEPROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25 NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE PRINTED CIRCUITS |
| title | Method for producing printed wiring board |
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