Driving circuit and circuit system thereof
A driving circuit has a current source, a first NMOS transistor, a second NMOS transistor, a resistor and a PNP bipolar junction transistor. A drain of first NMOS transistor receives a current with a positive temperature coefficient which is provided by the current source, and a gate of the first NM...
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creator | LI, CHENG-TAO LIU, WEI-JEAN |
description | A driving circuit has a current source, a first NMOS transistor, a second NMOS transistor, a resistor and a PNP bipolar junction transistor. A drain of first NMOS transistor receives a current with a positive temperature coefficient which is provided by the current source, and a gate of the first NMOS transistor is electrically connected to the drain of the first NMOS transistor. A gate of the second NMOS transistor is electrically connected to the drain of the first NMOS transistor. A drain and a source of the second NMOS transistor respectively receive an input voltage and generate an output voltage for driving a load. The two ends of the resistor are respectively electrically connected to a source of the first NMOS transistor and an emitter of the PNP bipolar junction transistor. A base of the PNP bipolar junction transistor is electrically connected to a source of the second NMOS transistor, and a collector of the PNP bipolar junction transistor is electrically connected to a low voltage. By selecting the |
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A drain of first NMOS transistor receives a current with a positive temperature coefficient which is provided by the current source, and a gate of the first NMOS transistor is electrically connected to the drain of the first NMOS transistor. A gate of the second NMOS transistor is electrically connected to the drain of the first NMOS transistor. A drain and a source of the second NMOS transistor respectively receive an input voltage and generate an output voltage for driving a load. The two ends of the resistor are respectively electrically connected to a source of the first NMOS transistor and an emitter of the PNP bipolar junction transistor. A base of the PNP bipolar junction transistor is electrically connected to a source of the second NMOS transistor, and a collector of the PNP bipolar junction transistor is electrically connected to a low voltage. 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A drain of first NMOS transistor receives a current with a positive temperature coefficient which is provided by the current source, and a gate of the first NMOS transistor is electrically connected to the drain of the first NMOS transistor. A gate of the second NMOS transistor is electrically connected to the drain of the first NMOS transistor. A drain and a source of the second NMOS transistor respectively receive an input voltage and generate an output voltage for driving a load. The two ends of the resistor are respectively electrically connected to a source of the first NMOS transistor and an emitter of the PNP bipolar junction transistor. A base of the PNP bipolar junction transistor is electrically connected to a source of the second NMOS transistor, and a collector of the PNP bipolar junction transistor is electrically connected to a low voltage. By selecting the</description><subject>CONTROLLING</subject><subject>PHYSICS</subject><subject>REGULATING</subject><subject>SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNByKcosy8xLV0jOLEouzSxRSMxLgbOLK4tLUnMVSjJSi1Lz03gYWNMSc4pTeaE0N4Oim2uIs4duakF-fGpxQWJyal5qSXxIuJGBkbGJpaGZkaMxMWoARL8pXQ</recordid><startdate>20231216</startdate><enddate>20231216</enddate><creator>LI, CHENG-TAO</creator><creator>LIU, WEI-JEAN</creator><scope>EVB</scope></search><sort><creationdate>20231216</creationdate><title>Driving circuit and circuit system thereof</title><author>LI, CHENG-TAO ; LIU, WEI-JEAN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TW202349162A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2023</creationdate><topic>CONTROLLING</topic><topic>PHYSICS</topic><topic>REGULATING</topic><topic>SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES</topic><toplevel>online_resources</toplevel><creatorcontrib>LI, CHENG-TAO</creatorcontrib><creatorcontrib>LIU, WEI-JEAN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LI, CHENG-TAO</au><au>LIU, WEI-JEAN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Driving circuit and circuit system thereof</title><date>2023-12-16</date><risdate>2023</risdate><abstract>A driving circuit has a current source, a first NMOS transistor, a second NMOS transistor, a resistor and a PNP bipolar junction transistor. A drain of first NMOS transistor receives a current with a positive temperature coefficient which is provided by the current source, and a gate of the first NMOS transistor is electrically connected to the drain of the first NMOS transistor. A gate of the second NMOS transistor is electrically connected to the drain of the first NMOS transistor. A drain and a source of the second NMOS transistor respectively receive an input voltage and generate an output voltage for driving a load. The two ends of the resistor are respectively electrically connected to a source of the first NMOS transistor and an emitter of the PNP bipolar junction transistor. A base of the PNP bipolar junction transistor is electrically connected to a source of the second NMOS transistor, and a collector of the PNP bipolar junction transistor is electrically connected to a low voltage. By selecting the</abstract><oa>free_for_read</oa></addata></record> |
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language | chi ; eng |
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subjects | CONTROLLING PHYSICS REGULATING SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES |
title | Driving circuit and circuit system thereof |
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