Control circuit and method for detecting glitch signal of bus
A control circuit and method for detecting glitch signal of a bus, including: input ends, receiving data signal and clock signal of the bus; a counter, counting to calculate a time or number of low-level period of the clock signal; a comparator, comparing the time and a threshold to generate a compa...
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creator | CHIU, TAIN TU, CHIEH-SHENG |
description | A control circuit and method for detecting glitch signal of a bus, including: input ends, receiving data signal and clock signal of the bus; a counter, counting to calculate a time or number of low-level period of the clock signal; a comparator, comparing the time and a threshold to generate a comparison result; an error detector, generating an error flag when the comparison result indicating that there is level change in the low-level period of the clock signal. |
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a comparator, comparing the time and a threshold to generate a comparison result; an error detector, generating an error flag when the comparison result indicating that there is level change in the low-level period of the clock signal.</description><language>chi ; eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231101&DB=EPODOC&CC=TW&NR=202343266A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231101&DB=EPODOC&CC=TW&NR=202343266A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHIU, TAIN</creatorcontrib><creatorcontrib>TU, CHIEH-SHENG</creatorcontrib><title>Control circuit and method for detecting glitch signal of bus</title><description>A control circuit and method for detecting glitch signal of a bus, including: input ends, receiving data signal and clock signal of the bus; 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TU, CHIEH-SHENG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TW202343266A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2023</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>CHIU, TAIN</creatorcontrib><creatorcontrib>TU, CHIEH-SHENG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHIU, TAIN</au><au>TU, CHIEH-SHENG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Control circuit and method for detecting glitch signal of bus</title><date>2023-11-01</date><risdate>2023</risdate><abstract>A control circuit and method for detecting glitch signal of a bus, including: input ends, receiving data signal and clock signal of the bus; a counter, counting to calculate a time or number of low-level period of the clock signal; a comparator, comparing the time and a threshold to generate a comparison result; an error detector, generating an error flag when the comparison result indicating that there is level change in the low-level period of the clock signal.</abstract><oa>free_for_read</oa></addata></record> |
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language | chi ; eng |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | Control circuit and method for detecting glitch signal of bus |
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