Stiffener ring for packages with micro-cable/optical connectors

A semiconductor package includes a package substrate, a semiconductor chip disposed on the package substrate, and a stiffener disposed on the package substrate. The stiffener includes an inner portion configured to surround the semiconductor chip, the inner portion defining a space on the package su...

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Hauptverfasser: PATEL, JANAK, NAYINI, MANISH, GRAF, RICHARD S
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Sprache:chi ; eng
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creator PATEL, JANAK
NAYINI, MANISH
GRAF, RICHARD S
description A semiconductor package includes a package substrate, a semiconductor chip disposed on the package substrate, and a stiffener disposed on the package substrate. The stiffener includes an inner portion configured to surround the semiconductor chip, the inner portion defining a space on the package substrate external to the inner portion and located between the inner portion and outer edges of the package substrate, and a plurality of leg portions extending outwardly from the inner portion toward one or more of the outer edges of the package substrate and corners of the package substrate.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_TW202339021A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>TW202339021A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_TW202339021A3</originalsourceid><addsrcrecordid>eNrjZLAPLslMS0vNSy1SKMrMS1dIyy9SKEhMzk5MTy1WKM8syVDIzUwuytdNTkzKSdXPLyjJTE7MUUjOz8tLTS7JLyrmYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxUCjgGaXxIeEGxkYGRtbGhgZOhoTowYAoi8xNQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Stiffener ring for packages with micro-cable/optical connectors</title><source>esp@cenet</source><creator>PATEL, JANAK ; NAYINI, MANISH ; GRAF, RICHARD S</creator><creatorcontrib>PATEL, JANAK ; NAYINI, MANISH ; GRAF, RICHARD S</creatorcontrib><description>A semiconductor package includes a package substrate, a semiconductor chip disposed on the package substrate, and a stiffener disposed on the package substrate. The stiffener includes an inner portion configured to surround the semiconductor chip, the inner portion defining a space on the package substrate external to the inner portion and located between the inner portion and outer edges of the package substrate, and a plurality of leg portions extending outwardly from the inner portion toward one or more of the outer edges of the package substrate and corners of the package substrate.</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20231001&amp;DB=EPODOC&amp;CC=TW&amp;NR=202339021A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20231001&amp;DB=EPODOC&amp;CC=TW&amp;NR=202339021A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>PATEL, JANAK</creatorcontrib><creatorcontrib>NAYINI, MANISH</creatorcontrib><creatorcontrib>GRAF, RICHARD S</creatorcontrib><title>Stiffener ring for packages with micro-cable/optical connectors</title><description>A semiconductor package includes a package substrate, a semiconductor chip disposed on the package substrate, and a stiffener disposed on the package substrate. The stiffener includes an inner portion configured to surround the semiconductor chip, the inner portion defining a space on the package substrate external to the inner portion and located between the inner portion and outer edges of the package substrate, and a plurality of leg portions extending outwardly from the inner portion toward one or more of the outer edges of the package substrate and corners of the package substrate.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAPLslMS0vNSy1SKMrMS1dIyy9SKEhMzk5MTy1WKM8syVDIzUwuytdNTkzKSdXPLyjJTE7MUUjOz8tLTS7JLyrmYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxUCjgGaXxIeEGxkYGRtbGhgZOhoTowYAoi8xNQ</recordid><startdate>20231001</startdate><enddate>20231001</enddate><creator>PATEL, JANAK</creator><creator>NAYINI, MANISH</creator><creator>GRAF, RICHARD S</creator><scope>EVB</scope></search><sort><creationdate>20231001</creationdate><title>Stiffener ring for packages with micro-cable/optical connectors</title><author>PATEL, JANAK ; NAYINI, MANISH ; GRAF, RICHARD S</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TW202339021A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>PATEL, JANAK</creatorcontrib><creatorcontrib>NAYINI, MANISH</creatorcontrib><creatorcontrib>GRAF, RICHARD S</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>PATEL, JANAK</au><au>NAYINI, MANISH</au><au>GRAF, RICHARD S</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Stiffener ring for packages with micro-cable/optical connectors</title><date>2023-10-01</date><risdate>2023</risdate><abstract>A semiconductor package includes a package substrate, a semiconductor chip disposed on the package substrate, and a stiffener disposed on the package substrate. The stiffener includes an inner portion configured to surround the semiconductor chip, the inner portion defining a space on the package substrate external to the inner portion and located between the inner portion and outer edges of the package substrate, and a plurality of leg portions extending outwardly from the inner portion toward one or more of the outer edges of the package substrate and corners of the package substrate.</abstract><oa>free_for_read</oa></addata></record>
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language chi ; eng
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Stiffener ring for packages with micro-cable/optical connectors
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-01T15%3A43%3A43IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=PATEL,%20JANAK&rft.date=2023-10-01&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ETW202339021A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true