Semiconductor etching methods
A method of etching into a one or more epitaxial layers of respective semiconductor material(s) in a vertical cavity surface emitting laser (VCSEL) semiconductor structure, wherein the or each semiconductor material is a III-V semiconductor material, a III-N semiconductor material, or a II-VI semico...
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creator | DENG, LIGANG HORE, KATIE |
description | A method of etching into a one or more epitaxial layers of respective semiconductor material(s) in a vertical cavity surface emitting laser (VCSEL) semiconductor structure, wherein the or each semiconductor material is a III-V semiconductor material, a III-N semiconductor material, or a II-VI semiconductor material is disclosed. The method comprises placing a substrate having the semiconductor structure thereon onto a support table in a plasma processing chamber, the semiconductor structure carrying a patterned mask on the surface of the semiconductor structure distal from the support table. The method also includes process steps of establishing a flow of an etch gas mixture through the plasma processing chamber and generating a plasma within the plasma processing chamber and simultaneously applying a radio frequency (RF) bias voltage to the support table; whereby the portion(s) of the semiconductor structure not covered by the patterned mask are exposed to the etch gas mixture plasma and are thereby etched t |
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The method comprises placing a substrate having the semiconductor structure thereon onto a support table in a plasma processing chamber, the semiconductor structure carrying a patterned mask on the surface of the semiconductor structure distal from the support table. The method also includes process steps of establishing a flow of an etch gas mixture through the plasma processing chamber and generating a plasma within the plasma processing chamber and simultaneously applying a radio frequency (RF) bias voltage to the support table; whereby the portion(s) of the semiconductor structure not covered by the patterned mask are exposed to the etch gas mixture plasma and are thereby etched t</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; CHEMISTRY ; COMPOUNDS THEREOF ; DEVICES USING STIMULATED EMISSION ; ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; INORGANIC CHEMISTRY ; METALLURGY ; NON-METALLIC ELEMENTS ; SEMICONDUCTOR DEVICES</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200401&DB=EPODOC&CC=TW&NR=202013498A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76294</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200401&DB=EPODOC&CC=TW&NR=202013498A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>DENG, LIGANG</creatorcontrib><creatorcontrib>HORE, KATIE</creatorcontrib><title>Semiconductor etching methods</title><description>A method of etching into a one or more epitaxial layers of respective semiconductor material(s) in a vertical cavity surface emitting laser (VCSEL) semiconductor structure, wherein the or each semiconductor material is a III-V semiconductor material, a III-N semiconductor material, or a II-VI semiconductor material is disclosed. The method comprises placing a substrate having the semiconductor structure thereon onto a support table in a plasma processing chamber, the semiconductor structure carrying a patterned mask on the surface of the semiconductor structure distal from the support table. The method also includes process steps of establishing a flow of an etch gas mixture through the plasma processing chamber and generating a plasma within the plasma processing chamber and simultaneously applying a radio frequency (RF) bias voltage to the support table; whereby the portion(s) of the semiconductor structure not covered by the patterned mask are exposed to the etch gas mixture plasma and are thereby etched t</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CHEMISTRY</subject><subject>COMPOUNDS THEREOF</subject><subject>DEVICES USING STIMULATED EMISSION</subject><subject>ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>INORGANIC CHEMISTRY</subject><subject>METALLURGY</subject><subject>NON-METALLIC ELEMENTS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJANTs3NTM7PSylNLskvUkgtSc7IzEtXyE0tychPKeZhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfEh4UYGRgaGxiaWFo7GxKgBAPa7JKc</recordid><startdate>20200401</startdate><enddate>20200401</enddate><creator>DENG, LIGANG</creator><creator>HORE, KATIE</creator><scope>EVB</scope></search><sort><creationdate>20200401</creationdate><title>Semiconductor etching methods</title><author>DENG, LIGANG ; HORE, KATIE</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TW202013498A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2020</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CHEMISTRY</topic><topic>COMPOUNDS THEREOF</topic><topic>DEVICES USING STIMULATED EMISSION</topic><topic>ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>INORGANIC CHEMISTRY</topic><topic>METALLURGY</topic><topic>NON-METALLIC ELEMENTS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>DENG, LIGANG</creatorcontrib><creatorcontrib>HORE, KATIE</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>DENG, LIGANG</au><au>HORE, KATIE</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor etching methods</title><date>2020-04-01</date><risdate>2020</risdate><abstract>A method of etching into a one or more epitaxial layers of respective semiconductor material(s) in a vertical cavity surface emitting laser (VCSEL) semiconductor structure, wherein the or each semiconductor material is a III-V semiconductor material, a III-N semiconductor material, or a II-VI semiconductor material is disclosed. The method comprises placing a substrate having the semiconductor structure thereon onto a support table in a plasma processing chamber, the semiconductor structure carrying a patterned mask on the surface of the semiconductor structure distal from the support table. The method also includes process steps of establishing a flow of an etch gas mixture through the plasma processing chamber and generating a plasma within the plasma processing chamber and simultaneously applying a radio frequency (RF) bias voltage to the support table; whereby the portion(s) of the semiconductor structure not covered by the patterned mask are exposed to the etch gas mixture plasma and are thereby etched t</abstract><oa>free_for_read</oa></addata></record> |
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language | chi ; eng |
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subjects | BASIC ELECTRIC ELEMENTS CHEMISTRY COMPOUNDS THEREOF DEVICES USING STIMULATED EMISSION ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INORGANIC CHEMISTRY METALLURGY NON-METALLIC ELEMENTS SEMICONDUCTOR DEVICES |
title | Semiconductor etching methods |
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