Chip packaging device and method of manufacturing same including a chip carrier, a chip, and a packaging unit which has a packaging board and a connection support structure
A chip packaging device comprises a chip carrier, a chip, and a packaging unit. The chip carrier includes a substrate and a conductive structure disposed on the substrate. The chip is disposed on the substrate and electrically connected to the conductive structure. The packaging unit includes a pack...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | HSIEH, TSUNG-PIN CHIU, ZZUI WEI, CHIENNG RU, SHAO-PIN |
description | A chip packaging device comprises a chip carrier, a chip, and a packaging unit. The chip carrier includes a substrate and a conductive structure disposed on the substrate. The chip is disposed on the substrate and electrically connected to the conductive structure. The packaging unit includes a packaging board and a connection support structure. The packaging board is spaced apart from the chip and is located on opposite sides of the chip from the substrate, and two ends of the connection support structure are respectively connected to the chip and the packaging board; the cross-sectional area of the connection support structure adjacent to the chip is less than the cross-sectional area of the connection support structure not adjacent to the chip. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_TW201943063A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>TW201943063A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_TW201943063A3</originalsourceid><addsrcrecordid>eNqNjb0KwkAQhNNYiPoOax8hGhEsJSg-gGAp694md5jsHfejL-VDaiSFdlbDMDPfjLNnpY0Dh3TDxkgDiu-GGFAUdBy1VWBr6FBSjRST7ysBOwYj1CbVWwTqEYTeG_b54PMPAr_ISUyEhzakQWP4ia4WvRoGZEWYorECITlnfYQQferPeZqNamwDzwadZPPD_lQdF-zshcMbyMLxcjqviuV2XRabclf-03kBoZNYig</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Chip packaging device and method of manufacturing same including a chip carrier, a chip, and a packaging unit which has a packaging board and a connection support structure</title><source>esp@cenet</source><creator>HSIEH, TSUNG-PIN ; CHIU, ZZUI ; WEI, CHIENNG ; RU, SHAO-PIN</creator><creatorcontrib>HSIEH, TSUNG-PIN ; CHIU, ZZUI ; WEI, CHIENNG ; RU, SHAO-PIN</creatorcontrib><description>A chip packaging device comprises a chip carrier, a chip, and a packaging unit. The chip carrier includes a substrate and a conductive structure disposed on the substrate. The chip is disposed on the substrate and electrically connected to the conductive structure. The packaging unit includes a packaging board and a connection support structure. The packaging board is spaced apart from the chip and is located on opposite sides of the chip from the substrate, and two ends of the connection support structure are respectively connected to the chip and the packaging board; the cross-sectional area of the connection support structure adjacent to the chip is less than the cross-sectional area of the connection support structure not adjacent to the chip.</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20191101&DB=EPODOC&CC=TW&NR=201943063A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20191101&DB=EPODOC&CC=TW&NR=201943063A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HSIEH, TSUNG-PIN</creatorcontrib><creatorcontrib>CHIU, ZZUI</creatorcontrib><creatorcontrib>WEI, CHIENNG</creatorcontrib><creatorcontrib>RU, SHAO-PIN</creatorcontrib><title>Chip packaging device and method of manufacturing same including a chip carrier, a chip, and a packaging unit which has a packaging board and a connection support structure</title><description>A chip packaging device comprises a chip carrier, a chip, and a packaging unit. The chip carrier includes a substrate and a conductive structure disposed on the substrate. The chip is disposed on the substrate and electrically connected to the conductive structure. The packaging unit includes a packaging board and a connection support structure. The packaging board is spaced apart from the chip and is located on opposite sides of the chip from the substrate, and two ends of the connection support structure are respectively connected to the chip and the packaging board; the cross-sectional area of the connection support structure adjacent to the chip is less than the cross-sectional area of the connection support structure not adjacent to the chip.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjb0KwkAQhNNYiPoOax8hGhEsJSg-gGAp694md5jsHfejL-VDaiSFdlbDMDPfjLNnpY0Dh3TDxkgDiu-GGFAUdBy1VWBr6FBSjRST7ysBOwYj1CbVWwTqEYTeG_b54PMPAr_ISUyEhzakQWP4ia4WvRoGZEWYorECITlnfYQQferPeZqNamwDzwadZPPD_lQdF-zshcMbyMLxcjqviuV2XRabclf-03kBoZNYig</recordid><startdate>20191101</startdate><enddate>20191101</enddate><creator>HSIEH, TSUNG-PIN</creator><creator>CHIU, ZZUI</creator><creator>WEI, CHIENNG</creator><creator>RU, SHAO-PIN</creator><scope>EVB</scope></search><sort><creationdate>20191101</creationdate><title>Chip packaging device and method of manufacturing same including a chip carrier, a chip, and a packaging unit which has a packaging board and a connection support structure</title><author>HSIEH, TSUNG-PIN ; CHIU, ZZUI ; WEI, CHIENNG ; RU, SHAO-PIN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TW201943063A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2019</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>HSIEH, TSUNG-PIN</creatorcontrib><creatorcontrib>CHIU, ZZUI</creatorcontrib><creatorcontrib>WEI, CHIENNG</creatorcontrib><creatorcontrib>RU, SHAO-PIN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HSIEH, TSUNG-PIN</au><au>CHIU, ZZUI</au><au>WEI, CHIENNG</au><au>RU, SHAO-PIN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Chip packaging device and method of manufacturing same including a chip carrier, a chip, and a packaging unit which has a packaging board and a connection support structure</title><date>2019-11-01</date><risdate>2019</risdate><abstract>A chip packaging device comprises a chip carrier, a chip, and a packaging unit. The chip carrier includes a substrate and a conductive structure disposed on the substrate. The chip is disposed on the substrate and electrically connected to the conductive structure. The packaging unit includes a packaging board and a connection support structure. The packaging board is spaced apart from the chip and is located on opposite sides of the chip from the substrate, and two ends of the connection support structure are respectively connected to the chip and the packaging board; the cross-sectional area of the connection support structure adjacent to the chip is less than the cross-sectional area of the connection support structure not adjacent to the chip.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | chi ; eng |
recordid | cdi_epo_espacenet_TW201943063A |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Chip packaging device and method of manufacturing same including a chip carrier, a chip, and a packaging unit which has a packaging board and a connection support structure |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-14T12%3A37%3A21IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=HSIEH,%20TSUNG-PIN&rft.date=2019-11-01&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ETW201943063A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |