System, apparatus and method for utilizing surface mount technology on metal substrates

A method for forming a circuit pattern on an integrated substrate structure includes providing an insulating surface which includes a pattern forming portion. An activation ink is deposited only on the pattern forming portion to form a non-conductive isolation layer. A first metal layer is formed on the non-conductive isolation layer by electroless plating. A patterned portion of the first metal layer is isolated from a remaining portion of the first metal layer to form the circuit pattern. A non-conductive masking layer is applied on the first metal layer. A second metal layer is formed on the non-conductive masking layer. A surface mount land pattern and pad configuration is determined. A solder mask layer is applied to the patterned portion. A protective layer is applied to protect pad areas not covered by the solder mask layer. An electrical component may then be mounted to the pad(s).