Power management for memory accesses in a system-on-chip

Techniques and mechanisms to manage power states for a system-on-chip (SOC). Multiple modules of the SOC include a first module to perform a task including one or more accesses to a memory. In an embodiment, the SOC is transitioned to one of a path-to-memory-available (PMA) power state and a path-to...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	KATHURIA, MANAN, ABRAHAM, PHILIP, MACHER, STEFAN, BIBIKAR, VASUDEV, VERMA, ROHIT R, PARTIWALA, SUKETU R, VAZ, IRWIN J
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES
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