Method for manufacturing semiconductor structure

A method for manufacturing a semiconductor structure is provided. The method includes following steps. A patterned gate layer is formed on a semiconductor substrate. A compensation layer is formed on the semiconductor substrate outside the patterned gate layer. A trench is formed in the compensation...

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description A method for manufacturing a semiconductor structure is provided. The method includes following steps. A patterned gate layer is formed on a semiconductor substrate. A compensation layer is formed on the semiconductor substrate outside the patterned gate layer. A trench is formed in the compensation layer and the semiconductor substrate. An epitaxial layer is formed in the trench. The step for forming the compensation layer is between the step for forming the patterned gate layer and the step for forming the epitaxial layer.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_TW201330064A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>TW201330064A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_TW201330064A3</originalsourceid><addsrcrecordid>eNrjZDDwTS3JyE9RSMsvUshNzCtNS0wuKS3KzEtXKE7NzUzOz0spTS4ByhWXFJWCZFJ5GFjTEnOKU3mhNDeDoptriLOHbmpBfnxqcUFicmpeakl8SLiRgaGxsYGBmYmjMTFqALmeLD0</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method for manufacturing semiconductor structure</title><source>esp@cenet</source><creator>CHOU, LINGUN</creator><creatorcontrib>CHOU, LINGUN</creatorcontrib><description>A method for manufacturing a semiconductor structure is provided. The method includes following steps. A patterned gate layer is formed on a semiconductor substrate. A compensation layer is formed on the semiconductor substrate outside the patterned gate layer. A trench is formed in the compensation layer and the semiconductor substrate. An epitaxial layer is formed in the trench. The step for forming the compensation layer is between the step for forming the patterned gate layer and the step for forming the epitaxial layer.</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2013</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20130716&amp;DB=EPODOC&amp;CC=TW&amp;NR=201330064A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76294</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20130716&amp;DB=EPODOC&amp;CC=TW&amp;NR=201330064A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHOU, LINGUN</creatorcontrib><title>Method for manufacturing semiconductor structure</title><description>A method for manufacturing a semiconductor structure is provided. The method includes following steps. A patterned gate layer is formed on a semiconductor substrate. A compensation layer is formed on the semiconductor substrate outside the patterned gate layer. A trench is formed in the compensation layer and the semiconductor substrate. An epitaxial layer is formed in the trench. The step for forming the compensation layer is between the step for forming the patterned gate layer and the step for forming the epitaxial layer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2013</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDDwTS3JyE9RSMsvUshNzCtNS0wuKS3KzEtXKE7NzUzOz0spTS4ByhWXFJWCZFJ5GFjTEnOKU3mhNDeDoptriLOHbmpBfnxqcUFicmpeakl8SLiRgaGxsYGBmYmjMTFqALmeLD0</recordid><startdate>20130716</startdate><enddate>20130716</enddate><creator>CHOU, LINGUN</creator><scope>EVB</scope></search><sort><creationdate>20130716</creationdate><title>Method for manufacturing semiconductor structure</title><author>CHOU, LINGUN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TW201330064A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2013</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>CHOU, LINGUN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHOU, LINGUN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method for manufacturing semiconductor structure</title><date>2013-07-16</date><risdate>2013</risdate><abstract>A method for manufacturing a semiconductor structure is provided. The method includes following steps. A patterned gate layer is formed on a semiconductor substrate. A compensation layer is formed on the semiconductor substrate outside the patterned gate layer. A trench is formed in the compensation layer and the semiconductor substrate. An epitaxial layer is formed in the trench. The step for forming the compensation layer is between the step for forming the patterned gate layer and the step for forming the epitaxial layer.</abstract><oa>free_for_read</oa></addata></record>
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language chi ; eng
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Method for manufacturing semiconductor structure
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-21T20%3A43%3A34IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CHOU,%20LINGUN&rft.date=2013-07-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ETW201330064A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true