Package-on-package semiconductor structure
A semiconductor package that includes a substrate having first and second major surfaces is presented. The package includes a plurality of landing pads and a semiconductor die disposed on the first major surface. A molded cap is disposed on the first surface to encapsulate the die and substrate. The...
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| creator | DIMAANO, ANTONIO JR SUN, YI-SHENG ANTHONY TAN, HIEN BOON GATBONTON, LIBRADO AMURAO RETUTA, DANNY |
| description | A semiconductor package that includes a substrate having first and second major surfaces is presented. The package includes a plurality of landing pads and a semiconductor die disposed on the first major surface. A molded cap is disposed on the first surface to encapsulate the die and substrate. The landing pads are covered when the cap is molded. Package interconnects are coupled to the landing pads. The package interconnects are exposed by the cap to facilitate package stacking. |
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The package includes a plurality of landing pads and a semiconductor die disposed on the first major surface. A molded cap is disposed on the first surface to encapsulate the die and substrate. The landing pads are covered when the cap is molded. Package interconnects are coupled to the landing pads. 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| language | chi ; eng |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Package-on-package semiconductor structure |
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