Efficient utilization of a multi-source network of control logic to achieve timing closure in a clocked logic circuit

A method, system, and computer program product are provided for achieving timing closure in a clocked logic circuit. For each local clock buffer in a set of local clock buffers, a logic synthesis tool determines a clock control signal input from a set of clock control signal inputs that will drive a...

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Bibliographische Detailangaben

Hauptverfasser:	TUCKER, KRISTEN M, ROSSER, THOMAS E, POUARZ, TRAVIS W, CURLEY, LAWRENCE D, ISAKSON, JOHN M, METS, ARJEN
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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