Semiconductor device having metal silicide and method of making the same
A MOS transistor device includes a polysilicon gate with opposing sidewalls over an active area of a semiconductor substrate. The polysilicon gate has a gate length "L". Dielectric spacers are disposed at a lower portion of the opposing sidewalls of the polysilicon gate. A metal silicide l...
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description | A MOS transistor device includes a polysilicon gate with opposing sidewalls over an active area of a semiconductor substrate. The polysilicon gate has a gate length "L". Dielectric spacers are disposed at a lower portion of the opposing sidewalls of the polysilicon gate. A metal silicide layer is situated approximately a vertical height "H" above a top surface of the dielectric spacers. The metal silicide layer is formed from an upper exposed portion of the polysilicon gate. Most importantly, the vertical height "H" is greater than the gate length "L" (H > L rule). A diffusion region is implanted into the semiconductor substrate and is adjacent to the polysilicon gate. |
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Dielectric spacers are disposed at a lower portion of the opposing sidewalls of the polysilicon gate. A metal silicide layer is situated approximately a vertical height "H" above a top surface of the dielectric spacers. The metal silicide layer is formed from an upper exposed portion of the polysilicon gate. Most importantly, the vertical height "H" is greater than the gate length "L" (H > L rule). A diffusion region is implanted into the semiconductor substrate and is adjacent to the polysilicon gate.</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2006</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20060516&DB=EPODOC&CC=TW&NR=200616149A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20060516&DB=EPODOC&CC=TW&NR=200616149A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LI, NIENUNG</creatorcontrib><title>Semiconductor device having metal silicide and method of making the same</title><description>A MOS transistor device includes a polysilicon gate with opposing sidewalls over an active area of a semiconductor substrate. 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A diffusion region is implanted into the semiconductor substrate and is adjacent to the polysilicon gate.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2006</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyk0KwjAQhuFsXIh6h_EAQqtScCmidG_BZRkmX81gfoqJPb8UPICrF16epWnvCCop2o-U9CaLSQXkeNL4pIDCnrJ6FbUgjnZeLllKAwV-zaY4UOaAtVkM7DM2v67M9nbtLu0OY-qRRxZElL577KuqqZv6eDof_jFflp40KQ</recordid><startdate>20060516</startdate><enddate>20060516</enddate><creator>LI, NIENUNG</creator><scope>EVB</scope></search><sort><creationdate>20060516</creationdate><title>Semiconductor device having metal silicide and method of making the same</title><author>LI, NIENUNG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TW200616149A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2006</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>LI, NIENUNG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LI, NIENUNG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device having metal silicide and method of making the same</title><date>2006-05-16</date><risdate>2006</risdate><abstract>A MOS transistor device includes a polysilicon gate with opposing sidewalls over an active area of a semiconductor substrate. The polysilicon gate has a gate length "L". Dielectric spacers are disposed at a lower portion of the opposing sidewalls of the polysilicon gate. A metal silicide layer is situated approximately a vertical height "H" above a top surface of the dielectric spacers. The metal silicide layer is formed from an upper exposed portion of the polysilicon gate. Most importantly, the vertical height "H" is greater than the gate length "L" (H > L rule). A diffusion region is implanted into the semiconductor substrate and is adjacent to the polysilicon gate.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Semiconductor device having metal silicide and method of making the same |
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