Polycrystalline SiGe junctions for advanced devices

A structure and method of fabrication for MOSFET devices with a polycrystalline SiGe junction is disclosed. Ge is selectively grown on Si while Si is selectively grown on Ge. Alternating deposition of Ge and Si layers yield the SiGe junction. The deposited layers are doped, and substantially the dop...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: JONES, ERIN C, AJMERA, ATUL, MILLER, ROBER J, CHAN, KEVIN K
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator JONES, ERIN C
AJMERA, ATUL
MILLER, ROBER J
CHAN, KEVIN K
description A structure and method of fabrication for MOSFET devices with a polycrystalline SiGe junction is disclosed. Ge is selectively grown on Si while Si is selectively grown on Ge. Alternating deposition of Ge and Si layers yield the SiGe junction. The deposited layers are doped, and substantially the dopants outdiffused into the device body. A thin porous oxide layer between the polycrystalline Ge and Si layers enhances the isotropy of the SiGe junctions.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_TW200539323A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>TW200539323A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_TW200539323A3</originalsourceid><addsrcrecordid>eNrjZDAOyM-pTC6qLC5JzMnJzEtVCM50T1XIKs1LLsnMzytWSMsvUkhMKUvMS05NUUhJLctMTi3mYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxIeFGBgamxpbGRsaOxsSoAQAnVyzX</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Polycrystalline SiGe junctions for advanced devices</title><source>esp@cenet</source><creator>JONES, ERIN C ; AJMERA, ATUL ; MILLER, ROBER J ; CHAN, KEVIN K</creator><creatorcontrib>JONES, ERIN C ; AJMERA, ATUL ; MILLER, ROBER J ; CHAN, KEVIN K</creatorcontrib><description>A structure and method of fabrication for MOSFET devices with a polycrystalline SiGe junction is disclosed. Ge is selectively grown on Si while Si is selectively grown on Ge. Alternating deposition of Ge and Si layers yield the SiGe junction. The deposited layers are doped, and substantially the dopants outdiffused into the device body. A thin porous oxide layer between the polycrystalline Ge and Si layers enhances the isotropy of the SiGe junctions.</description><language>chi ; eng</language><subject>AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUSPOLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE ; APPARATUS THEREFOR ; BASIC ELECTRIC ELEMENTS ; CHEMISTRY ; CRYSTAL GROWTH ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; METALLURGY ; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITHDEFINED STRUCTURE ; REFINING BY ZONE-MELTING OF MATERIAL ; SEMICONDUCTOR DEVICES ; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITHDEFINED STRUCTURE ; SINGLE-CRYSTAL-GROWTH ; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL ORUNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL</subject><creationdate>2005</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20051201&amp;DB=EPODOC&amp;CC=TW&amp;NR=200539323A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20051201&amp;DB=EPODOC&amp;CC=TW&amp;NR=200539323A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>JONES, ERIN C</creatorcontrib><creatorcontrib>AJMERA, ATUL</creatorcontrib><creatorcontrib>MILLER, ROBER J</creatorcontrib><creatorcontrib>CHAN, KEVIN K</creatorcontrib><title>Polycrystalline SiGe junctions for advanced devices</title><description>A structure and method of fabrication for MOSFET devices with a polycrystalline SiGe junction is disclosed. Ge is selectively grown on Si while Si is selectively grown on Ge. Alternating deposition of Ge and Si layers yield the SiGe junction. The deposited layers are doped, and substantially the dopants outdiffused into the device body. A thin porous oxide layer between the polycrystalline Ge and Si layers enhances the isotropy of the SiGe junctions.</description><subject>AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUSPOLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE</subject><subject>APPARATUS THEREFOR</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CHEMISTRY</subject><subject>CRYSTAL GROWTH</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>METALLURGY</subject><subject>PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITHDEFINED STRUCTURE</subject><subject>REFINING BY ZONE-MELTING OF MATERIAL</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITHDEFINED STRUCTURE</subject><subject>SINGLE-CRYSTAL-GROWTH</subject><subject>UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL ORUNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2005</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAOyM-pTC6qLC5JzMnJzEtVCM50T1XIKs1LLsnMzytWSMsvUkhMKUvMS05NUUhJLctMTi3mYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxIeFGBgamxpbGRsaOxsSoAQAnVyzX</recordid><startdate>20051201</startdate><enddate>20051201</enddate><creator>JONES, ERIN C</creator><creator>AJMERA, ATUL</creator><creator>MILLER, ROBER J</creator><creator>CHAN, KEVIN K</creator><scope>EVB</scope></search><sort><creationdate>20051201</creationdate><title>Polycrystalline SiGe junctions for advanced devices</title><author>JONES, ERIN C ; AJMERA, ATUL ; MILLER, ROBER J ; CHAN, KEVIN K</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TW200539323A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2005</creationdate><topic>AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUSPOLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE</topic><topic>APPARATUS THEREFOR</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CHEMISTRY</topic><topic>CRYSTAL GROWTH</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>METALLURGY</topic><topic>PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITHDEFINED STRUCTURE</topic><topic>REFINING BY ZONE-MELTING OF MATERIAL</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITHDEFINED STRUCTURE</topic><topic>SINGLE-CRYSTAL-GROWTH</topic><topic>UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL ORUNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL</topic><toplevel>online_resources</toplevel><creatorcontrib>JONES, ERIN C</creatorcontrib><creatorcontrib>AJMERA, ATUL</creatorcontrib><creatorcontrib>MILLER, ROBER J</creatorcontrib><creatorcontrib>CHAN, KEVIN K</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>JONES, ERIN C</au><au>AJMERA, ATUL</au><au>MILLER, ROBER J</au><au>CHAN, KEVIN K</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Polycrystalline SiGe junctions for advanced devices</title><date>2005-12-01</date><risdate>2005</risdate><abstract>A structure and method of fabrication for MOSFET devices with a polycrystalline SiGe junction is disclosed. Ge is selectively grown on Si while Si is selectively grown on Ge. Alternating deposition of Ge and Si layers yield the SiGe junction. The deposited layers are doped, and substantially the dopants outdiffused into the device body. A thin porous oxide layer between the polycrystalline Ge and Si layers enhances the isotropy of the SiGe junctions.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language chi ; eng
recordid cdi_epo_espacenet_TW200539323A
source esp@cenet
subjects AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUSPOLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE
APPARATUS THEREFOR
BASIC ELECTRIC ELEMENTS
CHEMISTRY
CRYSTAL GROWTH
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
METALLURGY
PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITHDEFINED STRUCTURE
REFINING BY ZONE-MELTING OF MATERIAL
SEMICONDUCTOR DEVICES
SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITHDEFINED STRUCTURE
SINGLE-CRYSTAL-GROWTH
UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL ORUNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL
title Polycrystalline SiGe junctions for advanced devices
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-10T14%3A16%3A05IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=JONES,%20ERIN%20C&rft.date=2005-12-01&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ETW200539323A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true