Method of dynamically controlling cache size

A power saving cache and a method of operation a power saving cache. The power saving cache includes circuitry to dynamically reduce the logical size of the cache in order to save power. Preferably, a method is used to determine optimal cache size for balancing power and performance, using a variety...

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Hauptverfasser:	KARTSCHOKE, PAUL D, COHEN, ERWIN B, KOSONOCKY, STEPHEN V, SANDON, PETER A, GOVETT, IAN R, WILLIAMS, KEITH R, COOK, THOMAS E
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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creator	KARTSCHOKE, PAUL D COHEN, ERWIN B KOSONOCKY, STEPHEN V SANDON, PETER A GOVETT, IAN R WILLIAMS, KEITH R COOK, THOMAS E
description	A power saving cache and a method of operation a power saving cache. The power saving cache includes circuitry to dynamically reduce the logical size of the cache in order to save power. Preferably, a method is used to determine optimal cache size for balancing power and performance, using a variety of combinable hardware and software techniques. Also, in a preferred embodiment, steps are used for maintaining coherency during cache resizing, including the handling of modified ("dirty") data in the cache, and steps are provided for partitioning a cache in one of several way to provide an appropriate configuration and granularity when resizing.
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subjects	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
title	Method of dynamically controlling cache size
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