Crack resistant interconnect module
A laminated flip-chip interconnect package comprising a substrate having a chip attach surface and a board attach surface that define contact pads for attachment to corresponding pads on the chip and board wherein the substrate board surface comprises at least one solid plane covering the chip attac...
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| creator | KOUICHI KIROSAWA SYLVESTER, MARK FREDERICK SADANOBU SATOU GORRELL, ROBIN EUGENE HOLCOMB, MICHAEL DEAN BANKS, DONALD RAY BALLARD, WILLIAM VERN TERUHIKO KIMURA |
| description | A laminated flip-chip interconnect package comprising a substrate having a chip attach surface and a board attach surface that define contact pads for attachment to corresponding pads on the chip and board wherein the substrate board surface comprises at least one solid plane covering the chip attach surface region near at least one chip corner. In one embodiment, the solid plane comprises a dielectric material, optionally covered with a soldermask or coverlay material. In an alternate embodiment, the solid plane comprises a metal, optionally covered with a soldermask or coverlay material. |
| format | Patent |
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In one embodiment, the solid plane comprises a dielectric material, optionally covered with a soldermask or coverlay material. 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In an alternate embodiment, the solid plane comprises a metal, optionally covered with a soldermask or coverlay material.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2004</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFB2LkpMzlYoSi3OLC5JzCtRyMwrSS1Kzs_LS00uUcjNTynNSeVhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfEh4UYGBiZGhqZmxo7GxKgBAAYaJt8</recordid><startdate>20041016</startdate><enddate>20041016</enddate><creator>KOUICHI KIROSAWA</creator><creator>SYLVESTER, MARK FREDERICK</creator><creator>SADANOBU SATOU</creator><creator>GORRELL, ROBIN EUGENE</creator><creator>HOLCOMB, MICHAEL DEAN</creator><creator>BANKS, DONALD RAY</creator><creator>BALLARD, WILLIAM VERN</creator><creator>TERUHIKO KIMURA</creator><scope>EVB</scope></search><sort><creationdate>20041016</creationdate><title>Crack resistant interconnect module</title><author>KOUICHI KIROSAWA ; SYLVESTER, MARK FREDERICK ; SADANOBU SATOU ; GORRELL, ROBIN EUGENE ; HOLCOMB, MICHAEL DEAN ; BANKS, DONALD RAY ; BALLARD, WILLIAM VERN ; TERUHIKO KIMURA</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TW200421563A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2004</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>KOUICHI KIROSAWA</creatorcontrib><creatorcontrib>SYLVESTER, MARK FREDERICK</creatorcontrib><creatorcontrib>SADANOBU SATOU</creatorcontrib><creatorcontrib>GORRELL, ROBIN EUGENE</creatorcontrib><creatorcontrib>HOLCOMB, MICHAEL DEAN</creatorcontrib><creatorcontrib>BANKS, DONALD RAY</creatorcontrib><creatorcontrib>BALLARD, WILLIAM VERN</creatorcontrib><creatorcontrib>TERUHIKO KIMURA</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KOUICHI KIROSAWA</au><au>SYLVESTER, MARK FREDERICK</au><au>SADANOBU SATOU</au><au>GORRELL, ROBIN EUGENE</au><au>HOLCOMB, MICHAEL DEAN</au><au>BANKS, DONALD RAY</au><au>BALLARD, WILLIAM VERN</au><au>TERUHIKO KIMURA</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Crack resistant interconnect module</title><date>2004-10-16</date><risdate>2004</risdate><abstract>A laminated flip-chip interconnect package comprising a substrate having a chip attach surface and a board attach surface that define contact pads for attachment to corresponding pads on the chip and board wherein the substrate board surface comprises at least one solid plane covering the chip attach surface region near at least one chip corner. In one embodiment, the solid plane comprises a dielectric material, optionally covered with a soldermask or coverlay material. In an alternate embodiment, the solid plane comprises a metal, optionally covered with a soldermask or coverlay material.</abstract><oa>free_for_read</oa></addata></record> |
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| language | chi ; eng |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Crack resistant interconnect module |
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