Wafer alignment method and system

Wafer alignment method and system

Wafers are aligned with one another by reference to features formed on or in each wafer. Notches are formed in each wafer, including a pivot-notch that allows for two-point contact, and a stop-notch that provides for single-point contact. A bias-notch is formed for pressing the wafers into engagemen...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Prabhu, Anmiv S, Samiee, Kevan, Capella, Richard, Mains, Peter
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Prabhu, Anmiv S
Samiee, Kevan
Capella, Richard
Mains, Peter
description Wafers are aligned with one another by reference to features formed on or in each wafer. Notches are formed in each wafer, including a pivot-notch that allows for two-point contact, and a stop-notch that provides for single-point contact. A bias-notch is formed for pressing the wafers into engagement with the two-contact element when it is in the pivot-notch and with the single-contact element when it is in the stop-notch. The wafers may be bonded to one another to maintain the alignment of the referenced features.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_NZ747836A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>NZ747836A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_NZ747836A3</originalsourceid><addsrcrecordid>eNrjZFAMT0xLLVJIzMlMz8tNzStRyE0tychPUUjMS1EoriwuSc3lYWBNS8wpTuWF0twMcm6uIc4euqkF-fGpxQWJyal5qSXxflHmJuYWxmaOxgQVAACsTSSj</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Wafer alignment method and system</title><source>esp@cenet</source><creator>Prabhu, Anmiv S ; Samiee, Kevan ; Capella, Richard ; Mains, Peter</creator><creatorcontrib>Prabhu, Anmiv S ; Samiee, Kevan ; Capella, Richard ; Mains, Peter</creatorcontrib><description>Wafers are aligned with one another by reference to features formed on or in each wafer. Notches are formed in each wafer, including a pivot-notch that allows for two-point contact, and a stop-notch that provides for single-point contact. A bias-notch is formed for pressing the wafers into engagement with the two-contact element when it is in the pivot-notch and with the single-contact element when it is in the stop-notch. The wafers may be bonded to one another to maintain the alignment of the referenced features.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20200228&amp;DB=EPODOC&amp;CC=NZ&amp;NR=747836A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20200228&amp;DB=EPODOC&amp;CC=NZ&amp;NR=747836A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Prabhu, Anmiv S</creatorcontrib><creatorcontrib>Samiee, Kevan</creatorcontrib><creatorcontrib>Capella, Richard</creatorcontrib><creatorcontrib>Mains, Peter</creatorcontrib><title>Wafer alignment method and system</title><description>Wafers are aligned with one another by reference to features formed on or in each wafer. Notches are formed in each wafer, including a pivot-notch that allows for two-point contact, and a stop-notch that provides for single-point contact. A bias-notch is formed for pressing the wafers into engagement with the two-contact element when it is in the pivot-notch and with the single-contact element when it is in the stop-notch. The wafers may be bonded to one another to maintain the alignment of the referenced features.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFAMT0xLLVJIzMlMz8tNzStRyE0tychPUUjMS1EoriwuSc3lYWBNS8wpTuWF0twMcm6uIc4euqkF-fGpxQWJyal5qSXxflHmJuYWxmaOxgQVAACsTSSj</recordid><startdate>20200228</startdate><enddate>20200228</enddate><creator>Prabhu, Anmiv S</creator><creator>Samiee, Kevan</creator><creator>Capella, Richard</creator><creator>Mains, Peter</creator><scope>EVB</scope></search><sort><creationdate>20200228</creationdate><title>Wafer alignment method and system</title><author>Prabhu, Anmiv S ; Samiee, Kevan ; Capella, Richard ; Mains, Peter</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_NZ747836A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2020</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Prabhu, Anmiv S</creatorcontrib><creatorcontrib>Samiee, Kevan</creatorcontrib><creatorcontrib>Capella, Richard</creatorcontrib><creatorcontrib>Mains, Peter</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Prabhu, Anmiv S</au><au>Samiee, Kevan</au><au>Capella, Richard</au><au>Mains, Peter</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Wafer alignment method and system</title><date>2020-02-28</date><risdate>2020</risdate><abstract>Wafers are aligned with one another by reference to features formed on or in each wafer. Notches are formed in each wafer, including a pivot-notch that allows for two-point contact, and a stop-notch that provides for single-point contact. A bias-notch is formed for pressing the wafers into engagement with the two-contact element when it is in the pivot-notch and with the single-contact element when it is in the stop-notch. The wafers may be bonded to one another to maintain the alignment of the referenced features.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_NZ747836A
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Wafer alignment method and system
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-21T08%3A32%3A27IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Prabhu,%20Anmiv%20S&rft.date=2020-02-28&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ENZ747836A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true