APPARATUS AND METHOD FOR HANDLING ACCESS OPERATIONS ISSUED TO LOCAL CACHE STRUCTURES WITHIN A DATA PROCESSING APPARATUS
An apparatus and method are provided for handling access operations issued to local cache structures (310, 330, and 350) within a data processing apparatus. The data processing apparatus comprises a plurality of processing units (10, 40) each having a local cache structure (310) associated therewith...
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creator | PIRY, Frederic Claude Marie MOUTON, Louis-Marie Vincent SCALABRINO, Luca |
description | An apparatus and method are provided for handling access operations issued to local cache structures (310, 330, and 350) within a data processing apparatus. The data processing apparatus comprises a plurality of processing units (10, 40) each having a local cache structure (310) associated therewith. Shared access coordination circuitry (370) is also provided for coordinating the handling of shared access operations issued to any of the local cache structures (310, 330, 350). For a shared access operation, the access control circuitry associated with the local cache structure (310) to which that shared access operation is issued will perform a local access operation to that local cache structure (310), and in addition will issue a shared access signal to the shared access coordination circuitry (370). For a local access operation, the access control circuitry would normally perform a local access operation on the associated local cache structure (310), and not notify the shared access coordination circuitry (370). However, if an access operation extension value is set, then the access control circuitry treats such a local access operation as a shared access operation. Such an approach ensures correction operation even after an operating system (92) and/or an application program are migrated from one processing unit (10) to another. |
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The data processing apparatus comprises a plurality of processing units (10, 40) each having a local cache structure (310) associated therewith. Shared access coordination circuitry (370) is also provided for coordinating the handling of shared access operations issued to any of the local cache structures (310, 330, 350). For a shared access operation, the access control circuitry associated with the local cache structure (310) to which that shared access operation is issued will perform a local access operation to that local cache structure (310), and in addition will issue a shared access signal to the shared access coordination circuitry (370). For a local access operation, the access control circuitry would normally perform a local access operation on the associated local cache structure (310), and not notify the shared access coordination circuitry (370). However, if an access operation extension value is set, then the access control circuitry treats such a local access operation as a shared access operation. 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The data processing apparatus comprises a plurality of processing units (10, 40) each having a local cache structure (310) associated therewith. Shared access coordination circuitry (370) is also provided for coordinating the handling of shared access operations issued to any of the local cache structures (310, 330, 350). For a shared access operation, the access control circuitry associated with the local cache structure (310) to which that shared access operation is issued will perform a local access operation to that local cache structure (310), and in addition will issue a shared access signal to the shared access coordination circuitry (370). For a local access operation, the access control circuitry would normally perform a local access operation on the associated local cache structure (310), and not notify the shared access coordination circuitry (370). However, if an access operation extension value is set, then the access control circuitry treats such a local access operation as a shared access operation. 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The data processing apparatus comprises a plurality of processing units (10, 40) each having a local cache structure (310) associated therewith. Shared access coordination circuitry (370) is also provided for coordinating the handling of shared access operations issued to any of the local cache structures (310, 330, 350). For a shared access operation, the access control circuitry associated with the local cache structure (310) to which that shared access operation is issued will perform a local access operation to that local cache structure (310), and in addition will issue a shared access signal to the shared access coordination circuitry (370). For a local access operation, the access control circuitry would normally perform a local access operation on the associated local cache structure (310), and not notify the shared access coordination circuitry (370). However, if an access operation extension value is set, then the access control circuitry treats such a local access operation as a shared access operation. Such an approach ensures correction operation even after an operating system (92) and/or an application program are migrated from one processing unit (10) to another.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | APPARATUS AND METHOD FOR HANDLING ACCESS OPERATIONS ISSUED TO LOCAL CACHE STRUCTURES WITHIN A DATA PROCESSING APPARATUS |
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