THIN FOIL SEMICONDUCTOR PACKAGE

THE PRESENT INVENTION RELATES TO METHODS AND ARRANGEMENTS FOR USING A THIN FOIL TO FORM ELECTRICAL INTERCONNECTS IN AN INTEGRATED CIRCUIT PACKAGE. ONE SUCH ARRANGEMENT INVOLVES A FOIL CARRIER STRUCTURE (100, 300, 404), WHICH INCLUDES A FOIL (118, 302, 402) ADHERED TO A CARRIER (102, 304, 406) HAVING...

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Hauptverfasser: BAYAN, JAIME A, TU, NGHIA THUC, CHIN, DAVID, WONG, WILL KIANG
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creator BAYAN, JAIME A
TU, NGHIA THUC
CHIN, DAVID
WONG, WILL KIANG
description THE PRESENT INVENTION RELATES TO METHODS AND ARRANGEMENTS FOR USING A THIN FOIL TO FORM ELECTRICAL INTERCONNECTS IN AN INTEGRATED CIRCUIT PACKAGE. ONE SUCH ARRANGEMENT INVOLVES A FOIL CARRIER STRUCTURE (100, 300, 404), WHICH INCLUDES A FOIL (118, 302, 402) ADHERED TO A CARRIER (102, 304, 406) HAVING CAVITIES (116, 305, 416). SOME METHODS OF THE PRESENT INVENTION INVOLVE ATTACHING DICE (318) TO THE FOIL (118, 302, 402) AND ENCAPSULATING THE FOIL CARRIER STRUCTURE (100, 300, 404) IN A MOLDING MATERIAL. IN ONE EMBODIMENT, THE MOLDING MATERIAL PRESSES AGAINST THE FOIL (118, 302, 402), WHICH CAUSES PORTIONS OF THE FOIL (118, 302, 402) TO DISTEND INTO THE CAVITIES (116, 305, 416) OF THE CARRIER (102, 304, 406). AS A RESULT, RECESSED AND RAISED AREAS (322) ARE FORMED IN THE FOIL (118, 302, 402). AFTERWARDS, THE CARRIER (102, 302, 406) IS REMOVED AND PORTIONS OF THE RAISED AREAS (322) IN THE FOIL (118, 302, 402) ARE REMOVED THROUGH ONE OF A VARIETY OF TECHNIQUES, SUCH AS GRINDING. THIS PROCESS HELPS DEFINE AND ELECTRICAL ISOLATE CONTACT PADS IN THE FOIL (118, 302, 402). THE RESULTING MOLDED FOIL STRUCTURE MAY THEN BE SINGULATED INTO MULTIPLE SEMICONDUCTOR PACKAGES.
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subjects CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
title THIN FOIL SEMICONDUCTOR PACKAGE
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