METHOD OF FORMING ULTRA SHALLOW JUNCTIONS

METHOD OF FORMING ULTRA SHALLOW JUNCTIONS

THE PRESENT INVENTION RELATES TO A METHOD OF FABRICATING A SEMICONDUCTOR DEVICE (FIGURE 1). IN SPECIFIC EMBODIMENTS, THE METHOD COMPRISES PROVIDING A SEMICONDUCTOR SUBSTRATE, AND ION IMPLANTING DOPANT IMPURITIES OVER A TIME PERIOD INTO THE SEMICONDUCTOR DEVICE BY VARYING AN ION ENERGY (102) OF IMPLA...

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1. Verfasser: NARAYANAN MEYYAPPAN
Format: Patent
Sprache:eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator NARAYANAN MEYYAPPAN
description THE PRESENT INVENTION RELATES TO A METHOD OF FABRICATING A SEMICONDUCTOR DEVICE (FIGURE 1). IN SPECIFIC EMBODIMENTS, THE METHOD COMPRISES PROVIDING A SEMICONDUCTOR SUBSTRATE, AND ION IMPLANTING DOPANT IMPURITIES OVER A TIME PERIOD INTO THE SEMICONDUCTOR DEVICE BY VARYING AN ION ENERGY (102) OF IMPLANTING THE DOPANT IMPURITIES (20) OVER THE TIME PERIOD.THE DOPANT IMPURITIES (20) ARE ACTIVATION ANNEALED TO FORM ONE OR MORE DOPED REGIONS (22) EXTENDING BELOW THE SURFACE OF THE SEMICONDUCTOR SUBSTRATE.THE ION ENERGY MAY BE VARIED CONTINUOUSLY OR IN A STEPWISE MANNER OVER THE TIME PERIOD (FIGURE 5), AND MAY ALSO BE VARIED IN A CYCLICAL MANNER (FIGURE 4).(FIG 2)
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_MY130338A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>MY130338A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_MY130338A3</originalsourceid><addsrcrecordid>eNrjZND0dQ3x8HdR8HdTcPMP8vX0c1cI9QkJclQI9nD08fEPV_AK9XMO8fT3C-ZhYE1LzClO5YXS3Axybq4hzh66qQX58anFBYnJqXmpJfG-kYbGBsbGFo7GBBUAAGgfI18</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>METHOD OF FORMING ULTRA SHALLOW JUNCTIONS</title><source>esp@cenet</source><creator>NARAYANAN MEYYAPPAN</creator><creatorcontrib>NARAYANAN MEYYAPPAN</creatorcontrib><description>THE PRESENT INVENTION RELATES TO A METHOD OF FABRICATING A SEMICONDUCTOR DEVICE (FIGURE 1). IN SPECIFIC EMBODIMENTS, THE METHOD COMPRISES PROVIDING A SEMICONDUCTOR SUBSTRATE, AND ION IMPLANTING DOPANT IMPURITIES OVER A TIME PERIOD INTO THE SEMICONDUCTOR DEVICE BY VARYING AN ION ENERGY (102) OF IMPLANTING THE DOPANT IMPURITIES (20) OVER THE TIME PERIOD.THE DOPANT IMPURITIES (20) ARE ACTIVATION ANNEALED TO FORM ONE OR MORE DOPED REGIONS (22) EXTENDING BELOW THE SURFACE OF THE SEMICONDUCTOR SUBSTRATE.THE ION ENERGY MAY BE VARIED CONTINUOUSLY OR IN A STEPWISE MANNER OVER THE TIME PERIOD (FIGURE 5), AND MAY ALSO BE VARIED IN A CYCLICAL MANNER (FIGURE 4).(FIG 2)</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2007</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20070629&amp;DB=EPODOC&amp;CC=MY&amp;NR=130338A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20070629&amp;DB=EPODOC&amp;CC=MY&amp;NR=130338A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>NARAYANAN MEYYAPPAN</creatorcontrib><title>METHOD OF FORMING ULTRA SHALLOW JUNCTIONS</title><description>THE PRESENT INVENTION RELATES TO A METHOD OF FABRICATING A SEMICONDUCTOR DEVICE (FIGURE 1). IN SPECIFIC EMBODIMENTS, THE METHOD COMPRISES PROVIDING A SEMICONDUCTOR SUBSTRATE, AND ION IMPLANTING DOPANT IMPURITIES OVER A TIME PERIOD INTO THE SEMICONDUCTOR DEVICE BY VARYING AN ION ENERGY (102) OF IMPLANTING THE DOPANT IMPURITIES (20) OVER THE TIME PERIOD.THE DOPANT IMPURITIES (20) ARE ACTIVATION ANNEALED TO FORM ONE OR MORE DOPED REGIONS (22) EXTENDING BELOW THE SURFACE OF THE SEMICONDUCTOR SUBSTRATE.THE ION ENERGY MAY BE VARIED CONTINUOUSLY OR IN A STEPWISE MANNER OVER THE TIME PERIOD (FIGURE 5), AND MAY ALSO BE VARIED IN A CYCLICAL MANNER (FIGURE 4).(FIG 2)</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2007</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZND0dQ3x8HdR8HdTcPMP8vX0c1cI9QkJclQI9nD08fEPV_AK9XMO8fT3C-ZhYE1LzClO5YXS3Axybq4hzh66qQX58anFBYnJqXmpJfG-kYbGBsbGFo7GBBUAAGgfI18</recordid><startdate>20070629</startdate><enddate>20070629</enddate><creator>NARAYANAN MEYYAPPAN</creator><scope>EVB</scope></search><sort><creationdate>20070629</creationdate><title>METHOD OF FORMING ULTRA SHALLOW JUNCTIONS</title><author>NARAYANAN MEYYAPPAN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_MY130338A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2007</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>NARAYANAN MEYYAPPAN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>NARAYANAN MEYYAPPAN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>METHOD OF FORMING ULTRA SHALLOW JUNCTIONS</title><date>2007-06-29</date><risdate>2007</risdate><abstract>THE PRESENT INVENTION RELATES TO A METHOD OF FABRICATING A SEMICONDUCTOR DEVICE (FIGURE 1). IN SPECIFIC EMBODIMENTS, THE METHOD COMPRISES PROVIDING A SEMICONDUCTOR SUBSTRATE, AND ION IMPLANTING DOPANT IMPURITIES OVER A TIME PERIOD INTO THE SEMICONDUCTOR DEVICE BY VARYING AN ION ENERGY (102) OF IMPLANTING THE DOPANT IMPURITIES (20) OVER THE TIME PERIOD.THE DOPANT IMPURITIES (20) ARE ACTIVATION ANNEALED TO FORM ONE OR MORE DOPED REGIONS (22) EXTENDING BELOW THE SURFACE OF THE SEMICONDUCTOR SUBSTRATE.THE ION ENERGY MAY BE VARIED CONTINUOUSLY OR IN A STEPWISE MANNER OVER THE TIME PERIOD (FIGURE 5), AND MAY ALSO BE VARIED IN A CYCLICAL MANNER (FIGURE 4).(FIG 2)</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title METHOD OF FORMING ULTRA SHALLOW JUNCTIONS
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-05T22%3A38%3A11IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=NARAYANAN%20MEYYAPPAN&rft.date=2007-06-29&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EMY130338A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true