SEMICONDUCTOR PACKAGE, A HOLDER, A METHOD FOR PRODUCING AND TESTING FOR THE SAME
A carrier 41 for a semiconductor device which comprises a plurality of leads (225) respectively made up of an inner lead (5, 93a, 225a) and an outer lead (8, 93b, 225b), a semiconductor chip (4, 223) electrically connected to the inner leads of the leads, and a package (7, 221) encapsulating at leas...
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| creator | KASAI, JUNICHI SAIGO, YUKIO YONETA, YOSHIYUKI TSUJI, KAZUTO TANIGUCHI, NORIO MASHIGO, DAKASHI SAKUMA, MASAO TAKENAKA, MASASHI |
| description | A carrier 41 for a semiconductor device which comprises a plurality of leads (225) respectively made up of an inner lead (5, 93a, 225a) and an outer lead (8, 93b, 225b), a semiconductor chip (4, 223) electrically connected to the inner leads of the leads, and a package (7, 221) encapsulating at least the inner leads and the semiconductor chip so that the outer leads extend outwardly of the package. The package (7, 221) has an upper part (7a, 221a) and a lower part (7b, 221b) which have mutually different sizes such that a stepped portion is formed between the upper and lower parts by the different sizes, and each of the outer leads (8, 93b) has a wide part (21) which is wider than other parts of the outer lead extending outwardly of the package only within the stepped portion of the package. The carrier has a sidewall 42 and locking parts 43a-43d, 44a-44d. The sidewall protects the outer leads from mechanical damage. |
| format | Patent |
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The package (7, 221) has an upper part (7a, 221a) and a lower part (7b, 221b) which have mutually different sizes such that a stepped portion is formed between the upper and lower parts by the different sizes, and each of the outer leads (8, 93b) has a wide part (21) which is wider than other parts of the outer lead extending outwardly of the package only within the stepped portion of the package. The carrier has a sidewall 42 and locking parts 43a-43d, 44a-44d. The sidewall protects the outer leads from mechanical damage.</description><edition>6</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; SEMICONDUCTOR DEVICES ; TESTING</subject><creationdate>1996</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19961214&DB=EPODOC&CC=KR&NR=960016562B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76294</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19961214&DB=EPODOC&CC=KR&NR=960016562B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KASAI, JUNICHI</creatorcontrib><creatorcontrib>SAIGO, YUKIO</creatorcontrib><creatorcontrib>YONETA, YOSHIYUKI</creatorcontrib><creatorcontrib>TSUJI, KAZUTO</creatorcontrib><creatorcontrib>TANIGUCHI, NORIO</creatorcontrib><creatorcontrib>MASHIGO, DAKASHI</creatorcontrib><creatorcontrib>SAKUMA, MASAO</creatorcontrib><creatorcontrib>TAKENAKA, MASASHI</creatorcontrib><title>SEMICONDUCTOR PACKAGE, A HOLDER, A METHOD FOR PRODUCING AND TESTING FOR THE SAME</title><description>A carrier 41 for a semiconductor device which comprises a plurality of leads (225) respectively made up of an inner lead (5, 93a, 225a) and an outer lead (8, 93b, 225b), a semiconductor chip (4, 223) electrically connected to the inner leads of the leads, and a package (7, 221) encapsulating at least the inner leads and the semiconductor chip so that the outer leads extend outwardly of the package. The package (7, 221) has an upper part (7a, 221a) and a lower part (7b, 221b) which have mutually different sizes such that a stepped portion is formed between the upper and lower parts by the different sizes, and each of the outer leads (8, 93b) has a wide part (21) which is wider than other parts of the outer lead extending outwardly of the package only within the stepped portion of the package. The carrier has a sidewall 42 and locking parts 43a-43d, 44a-44d. The sidewall protects the outer leads from mechanical damage.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1996</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZAgIdvX1dPb3cwl1DvEPUghwdPZ2dHfVUXBU8PD3cXENArF8XUM8_F0U3EDyQf5AlZ5-7gqOfi4KIa7BISA2SCbEw1Uh2NHXlYeBNS0xpziVF0pzMyi7uYY4e-imFuTHpxYXJCan5qWWxHsHWZoZGBiamZoZOTkZGhOnCgDVZi9W</recordid><startdate>19961214</startdate><enddate>19961214</enddate><creator>KASAI, JUNICHI</creator><creator>SAIGO, YUKIO</creator><creator>YONETA, YOSHIYUKI</creator><creator>TSUJI, KAZUTO</creator><creator>TANIGUCHI, NORIO</creator><creator>MASHIGO, DAKASHI</creator><creator>SAKUMA, MASAO</creator><creator>TAKENAKA, MASASHI</creator><scope>EVB</scope></search><sort><creationdate>19961214</creationdate><title>SEMICONDUCTOR PACKAGE, A HOLDER, A METHOD FOR PRODUCING AND TESTING FOR THE SAME</title><author>KASAI, JUNICHI ; SAIGO, YUKIO ; YONETA, YOSHIYUKI ; TSUJI, KAZUTO ; TANIGUCHI, NORIO ; MASHIGO, DAKASHI ; SAKUMA, MASAO ; TAKENAKA, MASASHI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR960016562BB13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1996</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>KASAI, JUNICHI</creatorcontrib><creatorcontrib>SAIGO, YUKIO</creatorcontrib><creatorcontrib>YONETA, YOSHIYUKI</creatorcontrib><creatorcontrib>TSUJI, KAZUTO</creatorcontrib><creatorcontrib>TANIGUCHI, NORIO</creatorcontrib><creatorcontrib>MASHIGO, DAKASHI</creatorcontrib><creatorcontrib>SAKUMA, MASAO</creatorcontrib><creatorcontrib>TAKENAKA, MASASHI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KASAI, JUNICHI</au><au>SAIGO, YUKIO</au><au>YONETA, YOSHIYUKI</au><au>TSUJI, KAZUTO</au><au>TANIGUCHI, NORIO</au><au>MASHIGO, DAKASHI</au><au>SAKUMA, MASAO</au><au>TAKENAKA, MASASHI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR PACKAGE, A HOLDER, A METHOD FOR PRODUCING AND TESTING FOR THE SAME</title><date>1996-12-14</date><risdate>1996</risdate><abstract>A carrier 41 for a semiconductor device which comprises a plurality of leads (225) respectively made up of an inner lead (5, 93a, 225a) and an outer lead (8, 93b, 225b), a semiconductor chip (4, 223) electrically connected to the inner leads of the leads, and a package (7, 221) encapsulating at least the inner leads and the semiconductor chip so that the outer leads extend outwardly of the package. The package (7, 221) has an upper part (7a, 221a) and a lower part (7b, 221b) which have mutually different sizes such that a stepped portion is formed between the upper and lower parts by the different sizes, and each of the outer leads (8, 93b) has a wide part (21) which is wider than other parts of the outer lead extending outwardly of the package only within the stepped portion of the package. The carrier has a sidewall 42 and locking parts 43a-43d, 44a-44d. The sidewall protects the outer leads from mechanical damage.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record> |
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| language | eng |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS SEMICONDUCTOR DEVICES TESTING |
| title | SEMICONDUCTOR PACKAGE, A HOLDER, A METHOD FOR PRODUCING AND TESTING FOR THE SAME |
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