APPARATUS AND METHOD FOR MEASURING THE RATE OF BITS ERRORS IN DATA COMMUNICATIONS

APPARATUS AND METHOD FOR MEASURING THE RATE OF BITS ERRORS IN DATA COMMUNICATIONS

The circuit is for measuring the bit error rate having certain greater level comprises a S-interface subscriber terminal (10), a network terminal (20), and a line terminal (30). A ST-bus interface (421) is connected to the ST-bus (B1-2,D) of the subscriber or line terminals and a HDLC protocol proce...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: CHON, JAE - HO
Format: Patent
Sprache:eng
Schlagworte:
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Beschreibung
Zusammenfassung:The circuit is for measuring the bit error rate having certain greater level comprises a S-interface subscriber terminal (10), a network terminal (20), and a line terminal (30). A ST-bus interface (421) is connected to the ST-bus (B1-2,D) of the subscriber or line terminals and a HDLC protocol processor (420) which is connected to FIFO (418,419) for storing the transmission/ reception data. The FIFO is also connected to the CPU of a microcontroller (403) for processing and analysing the data and a microprocessor interface (417).