BIDIRECTIONAL BUFFER WITH LATCH AND PARITY CAPABILITY

A circuit for buffering and parity checking digital data communicated between first and second data buses includes a plurality of bidirectional bit buffer circuits. Each of the bidirectional bit buffer circuits includes : a first data path comprising a data receiver, latch, and driver connected in s...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	DEAN, MARK E, GAUDENZI, GENE J, BLAND, PATRICK M, TEMPEST, SUSAN L, KRAMER, KEVIN G
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS PULSE TECHNIQUE
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