SEMICONDUCTOR MEMORY

© A folded bit line DRAM (10), with even and odd rows of memory cells (MC), includes spare even (SR2) and odd (SR1) rows of memory cells which can be substituted for standard rows found to have defective cells or interconnections. Each decoder (1, 2) associated with a standard row can be disconnecte...

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Bibliographische Detailangaben

Hauptverfasser:	DUMBRI AUSTIN C, PROSAIK FRANK J
Format:	Patent
Sprache:	eng ; kor
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
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