3D EA 3D I/O Resistive-feedback Low-swing 3D I/O for High-performance 3D High-bandwidth Memory System by using Evolutionary Algorithm
A high-performance 3D high-bandwidth memory system using a proposed EA optimization technique and a 3D I/O interface using resistive feedback is presented. The high-performance 3D high-bandwidth memory system using the EA optimization technique and the 3D I/O interface using resistive feedback propo...
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description | A high-performance 3D high-bandwidth memory system using a proposed EA optimization technique and a 3D I/O interface using resistive feedback is presented. The high-performance 3D high-bandwidth memory system using the EA optimization technique and the 3D I/O interface using resistive feedback proposed in the present invention includes a 3D high-bandwidth memory and a multi-drop (MD) I/O interface. The MD I/O interface includes a transmitting unit connected to a receiving unit through a TSV channel termination unit, the TSV channel termination unit forming a termination with the receiving unit through an nMOS diode and a pMOS diode connected in series, and the receiving unit that recovers data received from the transmitting unit through the TSV channel termination unit. According to embodiments of the present invention, an energy-efficient point-to-point (P2P) and MD memory interface can be provided using a new resistive feedback and ring amplification technology for 3D stacked high-bandwidth memory (HBM).
제안하는 EA 최적화 기법 및 저항 피드백을 이용한 3D I/O 인터페이스를 이용하는 고성능 3D 고대역 메모리 시스템이 제시된다. 본 발명에서 제안하는 EA 최적화 기법 및 저항 피드백을 이용한 3D I/O 인터페이스를 이용하는 고성능 3D 고대역 메모리 시스템은 3D 고대역 메모리 및 MD I/O 인터페이스(Multi-Drop I/O interface)를 포함하고, 상기 MD I/O 인터페이스는 TSV 채널 종단부를 통해 수신부와 연결되는 송신부, 직렬로 연결된 nMOS 다이오드 및 pMOS 다이오드를 통해 수신부와의 종단을 형성하는 TSV 채널 종단부 및 상기 TSV 채널 종단부를 통해 송신부로부터 입력 받은 데이터를 복구하는 수신부를 포함한다. |
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제안하는 EA 최적화 기법 및 저항 피드백을 이용한 3D I/O 인터페이스를 이용하는 고성능 3D 고대역 메모리 시스템이 제시된다. 본 발명에서 제안하는 EA 최적화 기법 및 저항 피드백을 이용한 3D I/O 인터페이스를 이용하는 고성능 3D 고대역 메모리 시스템은 3D 고대역 메모리 및 MD I/O 인터페이스(Multi-Drop I/O interface)를 포함하고, 상기 MD I/O 인터페이스는 TSV 채널 종단부를 통해 수신부와 연결되는 송신부, 직렬로 연결된 nMOS 다이오드 및 pMOS 다이오드를 통해 수신부와의 종단을 형성하는 TSV 채널 종단부 및 상기 TSV 채널 종단부를 통해 송신부로부터 입력 받은 데이터를 복구하는 수신부를 포함한다.</description><language>eng ; kor</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230801&DB=EPODOC&CC=KR&NR=20230114465A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,782,887,25571,76555</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230801&DB=EPODOC&CC=KR&NR=20230114465A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>GYUNGSU BYUN</creatorcontrib><title>3D EA 3D I/O Resistive-feedback Low-swing 3D I/O for High-performance 3D High-bandwidth Memory System by using Evolutionary Algorithm</title><description>A high-performance 3D high-bandwidth memory system using a proposed EA optimization technique and a 3D I/O interface using resistive feedback is presented. The high-performance 3D high-bandwidth memory system using the EA optimization technique and the 3D I/O interface using resistive feedback proposed in the present invention includes a 3D high-bandwidth memory and a multi-drop (MD) I/O interface. The MD I/O interface includes a transmitting unit connected to a receiving unit through a TSV channel termination unit, the TSV channel termination unit forming a termination with the receiving unit through an nMOS diode and a pMOS diode connected in series, and the receiving unit that recovers data received from the transmitting unit through the TSV channel termination unit. According to embodiments of the present invention, an energy-efficient point-to-point (P2P) and MD memory interface can be provided using a new resistive feedback and ring amplification technology for 3D stacked high-bandwidth memory (HBM).
제안하는 EA 최적화 기법 및 저항 피드백을 이용한 3D I/O 인터페이스를 이용하는 고성능 3D 고대역 메모리 시스템이 제시된다. 본 발명에서 제안하는 EA 최적화 기법 및 저항 피드백을 이용한 3D I/O 인터페이스를 이용하는 고성능 3D 고대역 메모리 시스템은 3D 고대역 메모리 및 MD I/O 인터페이스(Multi-Drop I/O interface)를 포함하고, 상기 MD I/O 인터페이스는 TSV 채널 종단부를 통해 수신부와 연결되는 송신부, 직렬로 연결된 nMOS 다이오드 및 pMOS 다이오드를 통해 수신부와의 종단을 형성하는 TSV 채널 종단부 및 상기 TSV 채널 종단부를 통해 송신부로부터 입력 받은 데이터를 복구하는 수신부를 포함한다.</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjM8KgkAYxL10iOodPui85L-6SxlGRWDdZdVPXXJ3ZXdVfIDeO426d5kZ5jfM3Hp5BwgDGPW0uUGMmmnDOiQFYp7S7AkX2RPdM1H-NoVUELGyIg2qMXMqMpzYp0upyHuWmwquyKUa4D5ogxzSAVo9nYSdrFvDpKAjDOpSKmYqvrRmBa01rr6-sNbH8LGPCDYyQd3QDAWa5By7tuvZjuP7u23g_bd6AzWaSIY</recordid><startdate>20230801</startdate><enddate>20230801</enddate><creator>GYUNGSU BYUN</creator><scope>EVB</scope></search><sort><creationdate>20230801</creationdate><title>3D EA 3D I/O Resistive-feedback Low-swing 3D I/O for High-performance 3D High-bandwidth Memory System by using Evolutionary Algorithm</title><author>GYUNGSU BYUN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20230114465A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; kor</language><creationdate>2023</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>GYUNGSU BYUN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>GYUNGSU BYUN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>3D EA 3D I/O Resistive-feedback Low-swing 3D I/O for High-performance 3D High-bandwidth Memory System by using Evolutionary Algorithm</title><date>2023-08-01</date><risdate>2023</risdate><abstract>A high-performance 3D high-bandwidth memory system using a proposed EA optimization technique and a 3D I/O interface using resistive feedback is presented. The high-performance 3D high-bandwidth memory system using the EA optimization technique and the 3D I/O interface using resistive feedback proposed in the present invention includes a 3D high-bandwidth memory and a multi-drop (MD) I/O interface. The MD I/O interface includes a transmitting unit connected to a receiving unit through a TSV channel termination unit, the TSV channel termination unit forming a termination with the receiving unit through an nMOS diode and a pMOS diode connected in series, and the receiving unit that recovers data received from the transmitting unit through the TSV channel termination unit. According to embodiments of the present invention, an energy-efficient point-to-point (P2P) and MD memory interface can be provided using a new resistive feedback and ring amplification technology for 3D stacked high-bandwidth memory (HBM).
제안하는 EA 최적화 기법 및 저항 피드백을 이용한 3D I/O 인터페이스를 이용하는 고성능 3D 고대역 메모리 시스템이 제시된다. 본 발명에서 제안하는 EA 최적화 기법 및 저항 피드백을 이용한 3D I/O 인터페이스를 이용하는 고성능 3D 고대역 메모리 시스템은 3D 고대역 메모리 및 MD I/O 인터페이스(Multi-Drop I/O interface)를 포함하고, 상기 MD I/O 인터페이스는 TSV 채널 종단부를 통해 수신부와 연결되는 송신부, 직렬로 연결된 nMOS 다이오드 및 pMOS 다이오드를 통해 수신부와의 종단을 형성하는 TSV 채널 종단부 및 상기 TSV 채널 종단부를 통해 송신부로부터 입력 받은 데이터를 복구하는 수신부를 포함한다.</abstract><oa>free_for_read</oa></addata></record> |
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title | 3D EA 3D I/O Resistive-feedback Low-swing 3D I/O for High-performance 3D High-bandwidth Memory System by using Evolutionary Algorithm |
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