DISPLAY PANEL AND METHOD OF THE SAME
Provided is a display panel comprising a light emitting element and a transistor electrically connected thereto. The transistor comprises: a bottom gate; an oxide semiconductor pattern disposed on the bottom gate; and a top gate disposed on the oxide semiconductor pattern. The oxide semiconductor pa...
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| creator | KIM YOUNGKUK MOON YOUHAN KIM SWAE HYUN |
| description | Provided is a display panel comprising a light emitting element and a transistor electrically connected thereto. The transistor comprises: a bottom gate; an oxide semiconductor pattern disposed on the bottom gate; and a top gate disposed on the oxide semiconductor pattern. The oxide semiconductor pattern comprises a first area and a second area disposed on the first area in a thickness direction of the oxide semiconductor pattern. The first area has a lower atomic percent of oxygen than that of the second area. Therefore, the present invention is capable of reducing a threshold voltage change amount caused by positive bias temperature stress.
발광소자와 이에 전기적으로 연결된 트랜지스터를 포함하는 표시패널이 제공된다. 트랜지스터는 바텀 게이트, 상기 바텀 게이트 상에 배치된 산화물 반도체 패턴, 및 상기 산화물 반도체 패턴 상에 배치된 탑 게이트를 포함한다. 상기 산화물 반도체 패턴은 제1 영역 및 상기 산화물 반도체 패턴의 두께 방향 내에서 상기 제1 영역 상에 배치된 제2 영역을 포함한다. 상기 제1 영역은 상기 제2 영역보다 낮은 산소의 원자%를 갖는다. |
| format | Patent |
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발광소자와 이에 전기적으로 연결된 트랜지스터를 포함하는 표시패널이 제공된다. 트랜지스터는 바텀 게이트, 상기 바텀 게이트 상에 배치된 산화물 반도체 패턴, 및 상기 산화물 반도체 패턴 상에 배치된 탑 게이트를 포함한다. 상기 산화물 반도체 패턴은 제1 영역 및 상기 산화물 반도체 패턴의 두께 방향 내에서 상기 제1 영역 상에 배치된 제2 영역을 포함한다. 상기 제1 영역은 상기 제2 영역보다 낮은 산소의 원자%를 갖는다.</description><language>eng ; kor</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230526&DB=EPODOC&CC=KR&NR=20230073378A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230526&DB=EPODOC&CC=KR&NR=20230073378A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KIM YOUNGKUK</creatorcontrib><creatorcontrib>MOON YOUHAN</creatorcontrib><creatorcontrib>KIM SWAE HYUN</creatorcontrib><title>DISPLAY PANEL AND METHOD OF THE SAME</title><description>Provided is a display panel comprising a light emitting element and a transistor electrically connected thereto. The transistor comprises: a bottom gate; an oxide semiconductor pattern disposed on the bottom gate; and a top gate disposed on the oxide semiconductor pattern. The oxide semiconductor pattern comprises a first area and a second area disposed on the first area in a thickness direction of the oxide semiconductor pattern. The first area has a lower atomic percent of oxygen than that of the second area. Therefore, the present invention is capable of reducing a threshold voltage change amount caused by positive bias temperature stress.
발광소자와 이에 전기적으로 연결된 트랜지스터를 포함하는 표시패널이 제공된다. 트랜지스터는 바텀 게이트, 상기 바텀 게이트 상에 배치된 산화물 반도체 패턴, 및 상기 산화물 반도체 패턴 상에 배치된 탑 게이트를 포함한다. 상기 산화물 반도체 패턴은 제1 영역 및 상기 산화물 반도체 패턴의 두께 방향 내에서 상기 제1 영역 상에 배치된 제2 영역을 포함한다. 상기 제1 영역은 상기 제2 영역보다 낮은 산소의 원자%를 갖는다.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFBx8QwO8HGMVAhw9HP1UXD0c1HwdQ3x8HdR8HdTCPFwVQh29HXlYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXx3kFGBkbGBgbmxsbmFo7GxKkCANTWI2M</recordid><startdate>20230526</startdate><enddate>20230526</enddate><creator>KIM YOUNGKUK</creator><creator>MOON YOUHAN</creator><creator>KIM SWAE HYUN</creator><scope>EVB</scope></search><sort><creationdate>20230526</creationdate><title>DISPLAY PANEL AND METHOD OF THE SAME</title><author>KIM YOUNGKUK ; MOON YOUHAN ; KIM SWAE HYUN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20230073378A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; kor</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>KIM YOUNGKUK</creatorcontrib><creatorcontrib>MOON YOUHAN</creatorcontrib><creatorcontrib>KIM SWAE HYUN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KIM YOUNGKUK</au><au>MOON YOUHAN</au><au>KIM SWAE HYUN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>DISPLAY PANEL AND METHOD OF THE SAME</title><date>2023-05-26</date><risdate>2023</risdate><abstract>Provided is a display panel comprising a light emitting element and a transistor electrically connected thereto. The transistor comprises: a bottom gate; an oxide semiconductor pattern disposed on the bottom gate; and a top gate disposed on the oxide semiconductor pattern. The oxide semiconductor pattern comprises a first area and a second area disposed on the first area in a thickness direction of the oxide semiconductor pattern. The first area has a lower atomic percent of oxygen than that of the second area. Therefore, the present invention is capable of reducing a threshold voltage change amount caused by positive bias temperature stress.
발광소자와 이에 전기적으로 연결된 트랜지스터를 포함하는 표시패널이 제공된다. 트랜지스터는 바텀 게이트, 상기 바텀 게이트 상에 배치된 산화물 반도체 패턴, 및 상기 산화물 반도체 패턴 상에 배치된 탑 게이트를 포함한다. 상기 산화물 반도체 패턴은 제1 영역 및 상기 산화물 반도체 패턴의 두께 방향 내에서 상기 제1 영역 상에 배치된 제2 영역을 포함한다. 상기 제1 영역은 상기 제2 영역보다 낮은 산소의 원자%를 갖는다.</abstract><oa>free_for_read</oa></addata></record> |
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| title | DISPLAY PANEL AND METHOD OF THE SAME |
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