ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF
An electronic device includes a first metal layer, a first insulating layer, a second metal layer, and a second insulating layer. The first insulating layer is disposed on the first metal layer. The second metal layer is disposed on the first insulating layer. The second insulating layer is disposed...
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| creator | TSENG HUNG I KAO KER YIH |
| description | An electronic device includes a first metal layer, a first insulating layer, a second metal layer, and a second insulating layer. The first insulating layer is disposed on the first metal layer. The second metal layer is disposed on the first insulating layer. The second insulating layer is disposed between the second metal layer and the first insulating layer. The second metal layer is electrically connected to the first metal layer through the first opening part of the first insulating layer and the second opening part of the second insulating layer. The reliability of the electronic device can be improved.
전자 장치는 제1 금속층, 제1 절연층, 제2 금속층 및 제2 절연층을 포함한다. 제1 절연층은 제1 금속층 상에 배치되고, 제2 금속층은 제1 절연층 상에 배치되며, 및 제2 절연층은 제2 금속층과 제1 절연층 사이에 배치된다. 제2 금속층은 제1 절연층의 제1 개구부 및 제2 절연층의 제2 개구부를 통해 제1 금속층과 전기적으로 연결된다. |
| format | Patent |
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전자 장치는 제1 금속층, 제1 절연층, 제2 금속층 및 제2 절연층을 포함한다. 제1 절연층은 제1 금속층 상에 배치되고, 제2 금속층은 제1 절연층 상에 배치되며, 및 제2 절연층은 제2 금속층과 제1 절연층 사이에 배치된다. 제2 금속층은 제1 절연층의 제1 개구부 및 제2 절연층의 제2 개구부를 통해 제1 금속층과 전기적으로 연결된다.</description><language>eng ; kor</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230324&DB=EPODOC&CC=KR&NR=20230041598A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230324&DB=EPODOC&CC=KR&NR=20230041598A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>TSENG HUNG I</creatorcontrib><creatorcontrib>KAO KER YIH</creatorcontrib><title>ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF</title><description>An electronic device includes a first metal layer, a first insulating layer, a second metal layer, and a second insulating layer. The first insulating layer is disposed on the first metal layer. The second metal layer is disposed on the first insulating layer. The second insulating layer is disposed between the second metal layer and the first insulating layer. The second metal layer is electrically connected to the first metal layer through the first opening part of the first insulating layer and the second opening part of the second insulating layer. The reliability of the electronic device can be improved.
전자 장치는 제1 금속층, 제1 절연층, 제2 금속층 및 제2 절연층을 포함한다. 제1 절연층은 제1 금속층 상에 배치되고, 제2 금속층은 제1 절연층 상에 배치되며, 및 제2 절연층은 제2 금속층과 제1 절연층 사이에 배치된다. 제2 금속층은 제1 절연층의 제1 개구부 및 제2 절연층의 제2 개구부를 통해 제1 금속층과 전기적으로 연결된다.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDBy9XF1Dgny9_N0VnBxDfN0dlVw9HNR8HX0C3VzdA4JDfL0c1fwdQ3x8HdRCPFwDXL1d-NhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfHeQUYGRsYGBiaGppYWjsbEqQIADFonpg</recordid><startdate>20230324</startdate><enddate>20230324</enddate><creator>TSENG HUNG I</creator><creator>KAO KER YIH</creator><scope>EVB</scope></search><sort><creationdate>20230324</creationdate><title>ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF</title><author>TSENG HUNG I ; KAO KER YIH</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20230041598A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; kor</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>TSENG HUNG I</creatorcontrib><creatorcontrib>KAO KER YIH</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>TSENG HUNG I</au><au>KAO KER YIH</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF</title><date>2023-03-24</date><risdate>2023</risdate><abstract>An electronic device includes a first metal layer, a first insulating layer, a second metal layer, and a second insulating layer. The first insulating layer is disposed on the first metal layer. The second metal layer is disposed on the first insulating layer. The second insulating layer is disposed between the second metal layer and the first insulating layer. The second metal layer is electrically connected to the first metal layer through the first opening part of the first insulating layer and the second opening part of the second insulating layer. The reliability of the electronic device can be improved.
전자 장치는 제1 금속층, 제1 절연층, 제2 금속층 및 제2 절연층을 포함한다. 제1 절연층은 제1 금속층 상에 배치되고, 제2 금속층은 제1 절연층 상에 배치되며, 및 제2 절연층은 제2 금속층과 제1 절연층 사이에 배치된다. 제2 금속층은 제1 절연층의 제1 개구부 및 제2 절연층의 제2 개구부를 통해 제1 금속층과 전기적으로 연결된다.</abstract><oa>free_for_read</oa></addata></record> |
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| title | ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF |
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